Philip Garrou
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Featured researches published by Philip Garrou.
Archive | 2008
Philip Garrou; Mitsumasa Koyanagi; Peter Ramm
3D IC is just one of a host of 3D integration schemes that exploit the z-direction Philip Garrou, Christopher Bower, Peter Ramm: Handbook of 3D Integration. Peter Ramm, Fraunhofer EMFT, defines heterogenous 3D integration as 3D for 3D Integration and Interposer Technologies”, Handbook of 3D Integration, Vol. Desktop 3D printing giant MakerBot has published a handbook designed to to support the integration of 3D printing in the classroom though challenges.
IEEE Transactions on Advanced Packaging | 2000
Philip Garrou
Several wafer level chip scale package (WLCSP) technologies have been developed which generate fully packaged and tested chips on the wafer prior to dicing. Many of these technologies are based on simple peripheral pad redistribution technology followed by attachment of 0.3-0.5 mm solder balls. The larger standoff generated by these solder balls result in better reliability for the WLCSPs when underfill is not used than for equivalent flip chip parts. Rambus/sup TM/ RDRAM and integrated passives are two applications that should see wide acceptance of WLCSP packages.
electronic components and technology conference | 2008
Christopher Bower; E. Menard; Philip Garrou
Transfer printing is a new technique that enables the massively parallel assembly of high performance semiconductor devices onto virtually any substrate material, including glass, plastics, metals or other semiconductors. This semiconductor transfer printing technology relies on the use of an elastomeric molded stamp to selectively pick-up devices from a source wafer and then prints the devices onto the target substrate. The key enabling technique is the ability to tune the adhesion between the elastomeric stamp and the semiconductor devices. The transfer process is massively parallel as the stamps are designed to transfer thousands of discrete devices in a single pick-up and print operation. Studies of the process yield indicate that print yields in excess of 99.9% can be achieved. In addition, experiments show that the chips can be printed with placement accuracy better than +/- 5 mum.
electronic components and technology conference | 1994
A.J.G. Strandjord; Robert Heistand; J.N. Bremmer; Philip Garrou; Theodore G. Tessier
As Multichip Module (MCM) technology has evolved from research to commercial production, cost has become the important issue for implementation. Manufacturing schemes are incorporating those processes and materials which take advantage of the most cost effective technologies to meet the specific performance requirements for a given application. The work described in this paper demonstrates how laminate based MCM technology (MCM-L) and deposited dielectric technology (MCM-D) can be combined to form a low cost solution for systems requiring high density interconnections. The use of laminate board technology to fabricate the relatively low density interconnect portion of the multilayer structure, allows one to take advantage of the well established and highly cost competitive printed wiring board (PWB) industry. Deposited dielectric technology takes advantage of the high density capabilities, normally associated with MCM-D packaging, to increase performance. Benzocyclobutene (BCB) is a well suited dielectric material for a laminate/deposited dielectric application (MCM-LD) since it can be cured at relatively low temperatures (220-275/spl deg/C). Additionally, the use of BCB as the interlayer dielectric provides a stable copper/BCB interface, excellent planarization over rough topographies, and exhibits very low moisture absorption. Several low cost processing techniques were demonstrated as part of this MCM-LD program. These include an inherently photosensitive BCB formulation as the thin film dielectrics, meniscus coating as the large area deposition process for the photosensitive-BCB, and an in-line belt furnace for Rapid Thermal Curing (RTC). A two layer module was fabricated to demonstrate the feasibility of this MCM-LD process flow. This paper describes the processing issues and techniques associated with such a hybridized interconnection technology.<<ETX>>
IEEE Transactions on Advanced Packaging | 2000
Philip Garrou; D. Scheck; Jang-Hi Im; Jack E. Hetzner; Gregory Meyers; D. Hawn; Jiali Wu; M.B. Vincent; Ching-Ping Wong
The adhesion of several commercial underfills (Dexter Hysol FP4511, FP4527, and CNB775-34) to BCB (CYCLOTENE 4022, 4024) has been studied through die shear testing and subsequent failure analysis. Die shear values range between 69-30 MPa. Failure analysis by optical microscopy, profilometry and XPS spectroscopy indicates mixed mode failure at various interfaces. From the die shear data collected before and after 24 h water boil for Cyclotene 4022 and 4024 (with AP3000 adhesion promoter) and underfillers FP 4511 and 4527 we find the die shear strength decreases an average of 11% for the four comparisons. Adhesion promoters based on vinyltriacetoxysilane or 3-amino-propyltriethoxysilane show equivalent die shear performance. Substrate surface cleaning based on UV ozone treatment reveals oxidation of the BCB surface which by SIMS analysis remains <0.1 /spl mu/m deep after 10 min of treatment.
electronic components and technology conference | 1995
A.J.G. Strandjord; Philip Garrou; Robert Heistand; Theodore G. Tessier
This paper demonstrates how laminate based printed-wiring-board technology (PWB) and thin film deposited dielectric technology (MCM-D) can be combined to form a low-cost solution for microelectronic interconnect schemes which require high density circuitry. A multilayer telecommunications module was fabricated to demonstrate the feasibility of this MCM-LD concept. Standard copper-clad laminates were processed using conventional PWB techniques to form the first level of metal interconnects (75 /spl mu/m lines and spaces). A photosensitive benzocyclobutene layer was coated onto the boards and patterned to form 50 /spl mu/m/spl times/200 /spl mu/m nested vias down to the metal lines. A second metal interconnect layer was formed from a sputtered seed layer and plated up copper. Chip interconnection was carried out using gold wirebonding. Several large-area-processing (LAP) techniques were evaluated to determine the compatibility of the two interconnect technologies and to demonstrate the cost advantages of manufacturing large panels at high throughput levels. Spin coating, spray coating, meniscus coating, and extrusion coating were compared as dielectric deposition options and an in-line belt furnace was used to cure the dielectric layers on the laminate boards (rapid thermal curing). Laminate materials which were evaluated include: FR-4 (epoxy), BT (bismaleimide-triazine), PI (polyimide), and CE (cyanate ester). >
electronic components and technology conference | 2010
Alan Huffman; Philip Garrou; Rex Anderson; Boyd Rogers
We present the results of study on the manufacturability and reliability of ALX211 polymer in wafer level packaging processes and structures. Previously, we studied the processing windows of ALX211 polymer, where process parameters were studied in lab conditions. The typical manufacturing environment differs from the laboratory environment in that delays between processing steps are typical and unavoidable. Determining the impact of these delays on the stability of the process is critical for determining how the material will perform in a manufacturing line. In this paper, we present new data on the impact of hold times between the main process sequences for the ALX211 process and show that the process is stable with hold times up to 24 hours between process steps. In addition, we present reliability results comparing the performance of polyimide, BCB, and ALX211 as evaluated in a bump-on-polymer test structure. Results of bump shear tests after process completion and after exposure to multiple reflow cycles are presented, as well as results of board level temperature cycling testing.
electronic components and technology conference | 2009
Alan Huffman; Jeffery Piascik; Philip Garrou
In this paper we present the results of a study done to compare and contrast BCB and ALX polymers in typical WLP structures fabricated at RTI. Based on initial studies of the materials vendor, Asahi Glass Corp, AGC, we have examined the processing parameter space of ALX-211, in order to develop scalable manufacturing processes for these films. We present process flow and photo property data on ALX-211, including spin speed curves and resolution plots. We also present data on the planarization capability of AL polymer, the adhesion of ALX-211 to metals and inorganic dielectric materials as evaluated using polymer bump shear structures. We have incorporated the ALX-211 polymer into a typical bump-on-polymer process flow, with eutectic Sn/Pb solder bumps, to compare its performance to that of BCB through solder bump shear testing.
electronic components and technology conference | 2000
Philip Garrou; Ying Hung So; J. Im; K. Ohba; H. Akimoto; M. Kohno; T. Shimoto; K. Matsui; Y. Shimada
Benzocyclobutene resin has been modified to allow fabrication of polymer coated Cu foil. New formulations show improved flexibility, flaking resistance, low tackiness, and better resin flow control during hot pressing, while keeping BCBs inherent advantages such as low moisture pick-up, high heat stability and excellent dielectric properties. BCB coated Cu foil has been laminated on FR-4 board by conventional hot press processing. Relevant build-up board processes such as laser via formation, electroless plating and drill through holes were accomplished. Test boards with a BCB build-up layer per side were evaluated and excellent reliabilities and excellent electrical performance was confirmed.
japan international electronic manufacturing technology symposium | 1995
Y. Ida; Philip Garrou; A.J.G. Strandjord; Scott L. Cummings; W. Boyd Rogers; M.J. Berry; S.R. Kisting
The processing conditions for photosensitive BCB (Cyclotene** 4024-40 and Cyclotene** 4026-46) were defined for a thin film Cu/Photo-BCB MCM-D structure. Fabrication of four layer MCM-Ds, designed by Sandia National Laboratories, was demonstrated. The modules were electrically tested, solder bumped, flip chip assembled and put through a reliability test program.