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Dive into the research topics where Philip S. Honsinger is active.

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Featured researches published by Philip S. Honsinger.


IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems | 2008

Simultaneous Escape-Routing Algorithms for Via Minimization of High-Speed Boards

Muhammet Mustafa Ozdal; Martin D. F. Wong; Philip S. Honsinger

Shrinking transistor sizes, increasing circuit complexities, and high clock frequencies bring new board-routing challenges that cannot be handled effectively by traditional routing algorithms. Many high-end designs in the industry today require manual routing efforts, which increases the design-cycle times considerably. In this paper, we propose an escape-routing algorithm to route nets within multiple dense components simultaneously so that the number of crossings in the intermediate area is minimized. We also show how to handle high-speed-design constraints within the framework of this algorithm. Experimental comparisons with a recently proposed algorithm show that our algorithm reduces the via requirements of industrial test cases on average by 39%.


international conference on computer aided design | 2005

An escape routing framework for dense boards with high-speed design constraints

Muhammet Mustafa Ozdal; Martin D. F. Wong; Philip S. Honsinger

Shrinking transistor sizes, increasing circuit complexities, and high clock frequencies bring new board routing challenges that cannot be handled effectively by traditional routing algorithms. Many high-end designs in the industry today require manual routing efforts, which increases the design cycle times considerably. In this paper, we propose an escape routing algorithm to route nets within multiple dense components simultaneously so that the number of crossings in the intermediate area is minimized. We also show how to handle high-speed design constraints within the framework of this algorithm. Experimental comparisons with a recently proposed algorithm (Ozdal and Wong, 2004) show that our algorithm reduces the via requirements of industrial test cases on average by 39%.


international conference on computer aided design | 2005

Optimal routing algorithms for pin clusters in high-density multichip modules

Muhammet Mustafa Ozdal; Martin D. F. Wong; Philip S. Honsinger

Optimal routing algorithms for pin clusters in high-density multichip modules As the circuit densities and transistor counts are increasing, the package routing problem is becoming more and more challenging. In this paper, we study an important routing problem encountered in typical high-end MCM designs: routing within dense pin clusters. Pin clusters are often formed by pins that belong to the same functional unit or the same data bus, and can become bottlenecks in terms of overall routability. Topically, these clusters have irregular shapes, which can be approximated with rectilinear convex boundaries. Since such boundaries have often irregular shapes, a traditional escape routing algorithm may give unroutable solutions. In this paper, we study how the positions of escape terminals on a convex boundary affect the overall routability. For this purpose, we propose a set of necessary and sufficient conditions to model routability outside a rectilinear convex boundary. Given an escape routing solution, we propose an optimal algorithm to select the maximal subset of nets that are routable outside the boundary. After that, we focus on an integrated approach to consider routability constraints (outside the boundary) during the actual escape routing algorithm. Here, we propose an optimal algorithm to find the best escape routing solution that satisfies all routability constraints. Our experiments demonstrate that we can reduce the number of layers by 17% on the average, by using this integrated methodology.


ACM Transactions on Design Automation of Electronic Systems | 2008

Optimal routing algorithms for rectilinear pin clusters in high-density multichip modules

Muhammet Mustafa Ozdal; Martin D. F. Wong; Philip S. Honsinger

As the circuit densities and transistor counts are increasing, the package routing problem is becoming more and more challenging. In this article, we study an important routing problem encountered in typical high-end MCM designs: routing within dense pin clusters. Pin clusters are often formed by pins that belong to the same functional unit or the same data bus, and can become bottlenecks in terms of overall routability. Typically, these clusters have irregular shapes, which can be approximated with rectilinear convex boundaries. Since such boundaries have often irregular shapes, a traditional escape routing algorithm may give unroutable solutions. In this article, we study how the positions of escape terminals on a convex boundary affect the overall routability. For this purpose, we propose a set of necessary and sufficient conditions to model routability outside a rectilinear convex boundary. Given an escape routing solution, we propose an optimal algorithm to select the maximal subset of nets that are routable outside the boundary. After that, we focus on an integrated approach to consider routability constraints (outside the boundary) during the actual escape routing algorithm. Here, we propose an optimal algorithm to find the best escape routing solution that satisfies all routability constraints. Our experiments demonstrate that we can reduce the number of layers by 17% on the average, by using this integrated methodology.


Archive | 1993

Hierarchical data model for design automation

John Youssef Sayah; Vinod Narayanan; Philip S. Honsinger


Archive | 1993

Method to optimize the wiring of multiple wiring media packages

Philip S. Honsinger; Lucy Lim; Vinod Narayanan


Archive | 1999

Method for improving wiring related yield and capacitance properties of integrated circuits by maze-routing

Gustavo E. Tellez; Gary R. Doyle; Philip S. Honsinger; Steven G. Lovejoy; Charles L. Meiley; Gorden Seth Starkey; Reginald B. Wilcox


Archive | 2001

Method of wiring power service terminals to a power network in a semiconductor integrated circuit

Scott Whitney Gould; Philip S. Honsinger; Andrew D. Huber; Patrick M. Ryan


Archive | 2002

Method and system for placing logic nodes based on an estimated wiring congestion

Ulrich Brenner; Philip S. Honsinger; Juergen Koehl; Bernhard Korte; Andre Rohe; Jens Vygen


Archive | 1993

Interconnection resource assignment method for differential current switch nets

Vinod Narayanan; Philip S. Honsinger; Lok Tin Liu

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