Philippe Cauvet

High throughput non-contact SiP testing

A non-contact method for parallel testing of system-in-package (SiP) assemblies is presented. This technology allows for JTAG testing of partially or fully populated SiPs in wafer form, in advance of final packaging. The technology utilizes non-contact GHz short-range, near field communications to transfer bi-directional data to SiP substrates; creating a wireless test access port or WTAP. The system is integrated with a standard probe card to deliver power and wireless signals. The wireless probes convert high frequency RF (GHz) transceiver signals to standard tester ATE logic levels and allow the use of standard probers and JTAG testers. In addition, all transceivers (DUTand probe) use antenna structures and electronics that are fully CMOS compliant. Enhancing the economics of SiP manufacture by enabling parallel non-contact testing of SiPs before packaging is a key benefit of this technology.

A novel DFT technique for testing complete sets of ADCs and DACs in complex SiPs

Testing mixed-signal circuits remains one of the most difficult challenges within the semiconductor industry. In this article, the authors present a novel DFT technique to test sets of ADCs and DACs embedded in a complex SiP. The technique provides fully digital testing on the converters to significantly reduce the cost of testing

System-in-Package, a Combination of Challenges and Solutions

System-in-package (SiP) has recently become a significant technology in the semiconductor industry, offering to the consumer applications many new product features without increasing the overall form factor. In this talk, the basic SiP concepts are first discussed, showing difference between SiP and SoC, illustrated by some examples, drawn from real-life cases. The specific challenges are considered from the testing point of view, focussing on the assembled yield and defect level for the packaged SiP. Various bare-die test techniques to find known-good-dies are described including their limitations, followed by two techniques to test the SiP at the system level: functional system test and embedded component test. A brief discussion on future SiP design and test challenges concludes the presentation.

A First Step for an INL Spectral-Based BIST: The Memory Optimization

Integral non-linearity (INL) is the main static parameter of analog-to-digital converter. This paper presents a comparison between different INL test techniques based on INL estimation from the spectrum of the converted signal. The most common technique is based on polynomial fitting of the INL curve. This technique is well suited to the estimation of a smooth INL curve without sharp transitions. The new method described in the paper is based on a Fourier series expansion of the INL curve. We demonstrate that this new technique allows a more efficient INL estimation. The comparison between the two techniques has been realized thanks to a metrics that considers the uncertainty of production test measurements. Finally, we propose a first step of the study of implementation feasibility of the INL estimation technique. This study focus only on the optimization of required memory.

Improving the dynamic measurements of ADCs using the 2-ADC method

Abstract Testing high-resolution analog-to-digital converters (≧12 bit) at high input frequencies (>5 MHz) becomes more difficult, because the disturbances of the automatic test equipment (ATE) become more significant. Although a lot of improvements have been made to modern ATEs during recent years, they are not sufficient, given the components specifications, especially the signal-to-noise ratio (SNR) parameter. This paper briefly describes the errors of the converters, which have to be tested, and those introduced by the equipment. From this description, a model has been built to simulate a new method based on the simultaneous measurement of two converters and which is intended to give an accurate estimation of the SNR, removing the correlated disturbances. The simulation results show the potential benefits of the method, and eventually, the experimental results in an industrial environment are given and discussed.

ADC production test technique using low-resolution arbitrary waveform generator

Standard production test techniques for ADC require an ATE with an arbitrary waveform generator (AWG) with a resolution at least 2 bits higher than the ADC under test resolution. This requirement is a real issue for the new high-performance ADCs. This paper proposes a test solution that relaxes this constraint. The technique allows the test of ADC harmonic distortions using only low-cost ATE. The method involves two steps. The first step, called the learning phase, consists in extracting the harmonic contributions from the AWG. These characteristics are then used during the second step, called the production test, to discriminate the harmonic distortions induced by the ADC under test from the ones created by the generator. Hardware experimentations are presented to validate the proposed approach.

Testing system-in-package wirelessly

The paper shows a new concept for testing a system-in-package (SiP) using a wireless communication. Trends of the SiP technology put more economic and technical constraints onto the test, while the contactless test techniques represent an opportunity to overcome the inherent problems. In this paper, we introduce a new test concept based on a wireless communication, a specific test access mechanism (TAM), and an optimised architecture. Although this approach is dedicated to an intermediate test of SiP, we explore other potential applications of this technology

Diagnosis of assembly failures for System-in-Package RF tuners

We present a diagnosis methodology for assembly failures in RF front-end circuits embedded in System-in-Package (SiP) designs. We focus on technologies where nonlinear components reside on several active dies and the linear components reside on a passive base. While there can be many pin connections between the base and the active die in these designs, there are only a few outside pins available. We present a systematic analysis technique to select viable test conditions to distinguish among the faults. Normal operation mode as well as non-functional mode test signals are used to increase the diagnostic resolution. We show that most assembly faults can be distinguished from one another using non-functional mode test signals on a generic LNA circuit. We also apply our technique to a commercial tuner for a subset of representative faults and reach the same conclusions.

Solutions for the self-adaptation of communicating systems in operation

In the context of mission-critical, safety-critical, and remote-controlled applications, it is required to equip systems with self-adapting capabilities. Adaptation is required in post-manufacturing to correct yield loss and achieve zero defective parts-per-million as well as during normal operation to account for different application scenarios and for varying environmental conditions. A self-adaptive system must be capable of providing the required high performances after manufacturing and throughout its normal operation regardless the application scenario wherein it is deployed and despite the varying environmental conditions. In this paper, we describe a generic post-manufacturing self-adaptation technique for RF circuits as well as concurrent self-adaptation techniques for a safety-critical medical sensor for glaucoma diagnosis and for a NFC system which is very sensitive to the environment in which it operates.

Efficient Objective Metric Tool for Medical Electrical Device Development: Eye Phantom for Glaucoma Diagnosis Device

Developing electronic medical devices is challenging. Simulations or in vivo experiments are not sufficient to obtain pertinent comparisons between potential design options. This paper presents a new artificial tool allowing objective comparisons between electronic device topologies. The main idea is to build a tool which is sensitive to targeted biological parameters only. These tools are generally called phantoms. The phantom presented in this paper is dedicated to IntraOcular Pressure (IOP) Measurement devices used in glaucoma diagnosis and treatment. It is called Biomechanical Eye Emulator (BEE). The BEE emulates the main biomechanical parameters influencing the IOP measurements. Because it is not sensitive to the living context, the BEE is the most efficient tool to investigate the best sensor design. BEE specifications are defined to be as close as possible to chosen models (humans or animals). Its efficiency is shown with a case study on rabbits. The results clearly demonstrate the BEE phantoms efficacy in providing objective assessment metrics during the sensor design process.