Pierre Lefranc

Characterization and Analysis of an Innovative Gate Driver and Power Supplies Architecture for HF Power Devices With High dv/dt

This paper presents a specific architecture for a low-side/high-side gate driver implementation for power devices running at high switching frequencies and under very high switching speeds. An electromagnetic interference (EMI) optimization is done by modifying the parasitic capacitance of the propagation paths between the power and the control sides, thanks to a specific design of the circuit. Moreover, to reduce the parasitic inductances and to minimize the antenna phenomenon, the paper studies which elements of the drivers’ circuitry must be brought as close as possible to the power parts. This is important when the ambient temperature of the power device becomes critical, for instance, in automotive and aeronautic applications. Simulations and experiments validate the advantages of the proposed architecture on the conducted EMI problem.

Design optimization of single-phase PFC rectifier using Pareto-Front analysis and including electro-thermal modelling

The design of power converters that have both high efficiency and high power density performance while maintaining the lowest possible cost and highest possible reliability is a challenge for power electronics engineers. Therefore, optimization techniques are often used to obtain the optimal solution for a given set of specified objectives. As a result, engineers must devise the correct methodology to solve multi-variant problems arising from these fixed objectives. The aim of this paper is to investigate PFC rectifier performance as a function of design variables and temperature impact using a bi-objective optimization algorithm. A methodology based on a Pareto-Front analysis to find the optimal design variable is described and a design model including electro-thermal modeling and power loss calculations is presented. Subsequently, the optimization result of a single-phase boost PFC converter operating in continuous conduction mode (CCM) for input power levels of 3kW is analyzed, and then the methodology to evaluate cost and reliability variables for design optimization is presented. FEM simulations and experimental results are shown to demonstrate the effectiveness of the proposed models.

A novel 3D structure for synchronous buck converter based on nitride Gallium transistors

In this paper a novel power loop structure design is proposed and analyzed for converters based on Nitride Gallium transistors. Thanks to its innovative way to place the decoupling capacitors and the GaN devices, the proposed structure shows better results in terms of parasitic loop inductance than a classical 2-D power loop structure, leading to lower voltage stress over the GaN transistors (1.46 nH for the 3-D structure against 5,82 nH for the 2-D one). Moreover, this design generates lower common mode disturbances, which is experimentally demonstrated with EMC tests. Eventually, efficiency is investigated making comparison for the same experimental conditions.

Design of a GaN HEMT based inverter leg power module for aeronautic applications

This paper presents the design of an inverter leg power module using GaN HEMT power components, and dedicated to aeronautical transports domain. This module has been designed collectively between industrial and academic partners, considering the thermal, electrical and thermomechanical aspects while co-developing the component and the package. The environment of the transistors is especially adapted to GaN materials for high frequency and high temperature operating by, among other thing, adapting the power components surface and bringing closer the decoupling capacitors and the control system. The first part of the paper describes the original part of the module, the second one is focused on the electrical and EMI aspects, the third part presents thermal simulations and the last one describes the thermomechanical analysis of the structure.