Pierre Olivier

MAGNETIC RESONANCE IMAGING OF NORMAL AND OSTEOARTHRITIC CARTILAGE

(MRI) has been slow to gain acceptance for cartilage evaluation because of its limited spatial resolution and because of the poor contrast between cartilage and adjacent structures. Continual improvement in gradient performance and coil design and the development of more efficient pulse sequences have overcome many of the early limitations of MIU. These improvements make possible high-resolution multiplanar and 3-dimensional (3-D) images with a wide variety of contrast. In this article, we present recent refinements in MRI of cartilage and offer a key for interpreting the wide range of images that are produced. Technical factors in MRI The pattern of cartilage as seen on MRT depends on spatial resolution and contrast. These factors are related to the choice of sequence and can be modified in various ways by the addition of pulses and contrast agents. In some cases, artifacts can greatly affect the quality of the images of hyaline cartilage.

Structural evaluation of articular cartilage: Potential contribution of magnetic resonance techniques used in clinical practice

OBJECTIVE To determine whether routine magnetic resonance imaging (MRI) techniques can detect age-related structural modifications of bovine articular cartilage. METHODS The cartilage of 3-month-old, 3-year-old, and 13-year-old animals was studied. T1- and T2-weighted MR sequences were performed using a 1.5T clinical imager and a 3-inch surface coil. Histologic slices (5 microm) of cartilage specimens were stained with picrosirius red (for collagen) and toluidine blue (for glycosaminoglycans [GAGs]). A polarized light study was performed to determine the collagen network organization. Except for the 13-year-old animal cartilage, the biochemical content was studied on slices cut parallel to the surface to determine GAG and hydroxyproline (collagen) content. Cartilage profiles were performed to determine the MR pixel intensity and the histologic color intensity. RESULTS On T1-weighted images, the cartilage was homogeneous, with pixel intensity profiles presenting low variations. On T2-weighted images, the cartilage was laminar in the 3-month-old animals and became homogeneous thereafter. The pixel intensity varied through the cartilage depth with a profile that depended on the age of the animal. The collagen and GAG staining showed abrupt transitions in the 3-month-old animal, while in older animals the cartilage became more homogeneous with a mild gradient of matrix constituents with depth. These results were confirmed by findings of a biochemical study. In addition to these matrix content variations, the bovine cartilage presented modifications of its collagen network organization with aging. CONCLUSION The MR T2-weighted sequences depicted signal variations with age in bovine cartilage concomitant with modifications in its structure. If confirmed in clinics, these observations will reinforce the place of MRI in characterizing cartilage with aging and pathologic processes.

On benchmarking embedded Linux flash file systems

Due to its attractive characteristics in terms of performance, weight and power consumption, NAND flash memory became the main non volatile memory (NVM) in embedded systems. Those NVMs also present some specific characteristics/constraints: good but asymmetric I/O performance, limited lifetime, write/erase granularity asymmetry, etc. Those peculiarities are either managed in hardware for flash disks (SSDs, SD cards, USB sticks, etc.) or in software for raw embedded flash chips. When managed in software, flash algorithms and structures are implemented in a specific flash file system (FFS). In this paper, we present a performance study of the most widely used FFSs in embedded Linux: JFFS2, UBIFS, and YAFFS. We show some very particular behaviors and large performance disparities for tested FFS operations such as mounting, copying, and searching file trees, compression, etc.

MaCACH: An adaptive cache-aware hybrid FTL mapping scheme using feedback control for efficient page-mapped space management

Flash memories based storage systems have some specific constraints leading designers to encapsulate some management services into a hardware/software layer called the Flash Translation Layer (FTL). The performance of flash based storage systems such as Solid State Drives (SSDs) are strongly driven by the FTL intricacies and also by a cache system placed on top of the FTL. Those systems are generally developed independently. In order to accelerate I/O request processing, FTLs use some space of the flash memory called the over-provisioning space. The over-provisioning space is thus not dedicated to data storage and should be small and of fixed size. This paper presents MaCACH, a maximum page-mapped region usage, cache-aware, and configurable hybrid mapping scheme. MaCACH design is based on two motivations: (1) the FTL should make full profit of the fixed size over-provisioning space to accelerate I/O processing, (2) as in most cases cache systems are put on top of FTLs, the latter should use information about the former in order to optimize data management. MaCACH is mainly based on two solutions: (1) it uses a proportional–integral–derivative (PID) feedback control system to keep the over-provisioning space fully used whatever the I/O workload characteristics, making it more efficient, (2) it is cache-aware as it uses a common feature of flash specific caches in order to route evicted data toward a page-mapped or block-mapped area which helps in optimizing the write operation costs. The performance evaluation shows very good behavior of MaCACH as compared to state-of-the-art FTLs in addition to a high flexibility as MaCACH has a large configuration space.

Performance analysis and modeling of SQLite embedded databases on flash file systems

Databases are more and more used in embedded system applications and especially in consumer electronics. This comes from the need to structure user and/or system data to be more efficiently managed and accessed. The transactional database management systems widely used in embedded systems have been designed considering hard disk drives as the storage device. In embedded systems, NAND flash memory is the main storage media and its intricacies make it fundamentally different from hard drives on many points of view, in particular in terms of performance and access mode. The performance behavior of on-flash database applications remains largely unknown, and we believe a better adequacy between those applications and flash management systems would lead to strong optimizations. A first step in that process is to assess and understand the performance behavior of database applications on flash memory. For this sake, this paper presents a micro benchmarking and modeling methodology, as well as the associated results and analysis for SQLite database queries on embedded flash specific file systems. SQLite is one of the most used database application in embedded systems and especially consumer electronics. This methodology has been applied and validated on two embedded hardware platforms. Flash file systems (FFS) behavior are very specific to flash memory intricacies and the objective of this study is to highlight the interactions between flash memory, FFSs, and SQLite based applications. The model proved to be very accurate in predicting flash I/O performance for a given workload.

Micro-benchmarking Flash Memory File-System Wear Leveling and Garbage Collection: A Focus on Initial State Impact

NAND flash memories are currently the de facto secondary storage technology in the embedded system domain thanks to their benefits mainly in terms of energy consumption, I/O performance, and data storage density. This Non-Volatile Memory (NVM) technology has even made substantial strides into enterprise storage systems. However, flash memories have particular constraints that are mainly the limited lifetime, the erase-before-write rule, and the write/erase operation granularity asymmetry. Those peculiarities are either handled in hardware, throughout a specific controller, or in software, with the help of a dedicated Flash File System (FFS). This paper presents a comprehensive study on the impact of different FFS implementations of wear leveling and garbage collection on flash memory performance and lifetime according to different initial states. This study is an attempt to push state-of-the-art work on FFSs by adding some flash memory specific features micro-benchmarking techniques.

Characterization of OLTP I/O workloads for dimensioning embedded write cache for flash memories: a case study

More and more enterprise servers storage systems are migrating toward flash based drives (Solid State Drives) thanks to their attractive characteristics. They are lightweight, power efficient and supposed to outperform traditional disks. The two main constraints of flash memories are: 1) the limited number of achievable write operations beyond which a given cell can no more retain data, and 2) the erase-before-write rule decreasing the write performance. A RAM cache can help to reduce this problem; they are mainly used to increase performance and lifetime by absorbing flash write operations. RAM caches being very costly, their dimensioning is critical. In this paper, we explore some OLTP I/O workload characteristics with regards to flash memory cache systems structure and configuration. We try, throughout I/O workload analysis to reveal some important elements to take into account to allow a good dimensioning of those embedded caches.

Revisiting read-ahead efficiency for raw NAND flash storage in embedded Linux

The Linux Read-Ahead mechanism has been designed to bridge the gap between the secondary storage low performance and I/O read-intensive applications for personal computers and servers. This paper revisits the efficiency of this mechanism for embedded Linux using flash memory as secondary storage, which is the case for most embedded systems. Indeed, Linux kernel uses the same read-ahead mechanism whatever the application domain. This paper evaluates the efficiency of read-ahead technique for the widely used flash specific file systems that are JFFS2 and YAFFS2, in terms of response time and energy consumption. We used micro-benchmarks to investigate read-ahead effect on those metrics at a fine (system call) granularity. Moreover, we also study this impact at a higher application level using a macro-benchmark evaluating read-ahead effect on the SQLite DBMS read performance and power consumption. As described in this paper, disabling this mechanism can improve the performance and energy consumption by up to 70% for sequential patterns and up to 60% for random patterns.

Modeling driver level NAND flash memory I/O performance and power consumption for embedded Linux

This paper presents a methodology for modeling performance and power consumption of NAND flash memory I/O operations. This study focuses on embedded systems executing the Linux Operating System (OS), equipped with bare flash chips (e.g, smartphones, tablets, routers, etc). Bare flash chips are fully managed by the Linux OS through some specific flash file systems. Indeed, embedded Linux became the de facto OS for many embedded systems, and predicting the performance and energy consumption of I/O operations is critical for many application domains such as multimedia and embedded databases. The presented model is designed at the driver level, and each elementary NAND flash key-operation is modeled. As a case study, the methodology presented was applied and validated on a test hardware / software platform. The modeling methodology relies on a generic and reusable parameter extraction process and tools. Their purpose is to characterize flash power consumption and performance in order to specialize the model for various platforms. This work is a first step toward modeling the performance and the power consumption for all the embedded Linux I/O storage hierarchy: from the applicative layer and down to the storage media.

A hardware time manager implementation for the Xenomai real-time kernel of embedded Linux

Nowadays, the use of embedded operating systems in different embedded projects is subject to a tremendous growth. Embedded Linux is becoming one of those most popular EOSs due to its modularity, efficiency, reliability, and cost. One way to make it hard real-time is to include a real-time kernel like Xenomai. One of the key characteristics of a Real-Time Operating System (RTOS) is its ability to meet execution time deadlines deterministically. So, the more precise and flexible the time management can be, the better it can handle efficiently the determinism for different embedded applications. RTOS time precision is characterized by a specific periodic interrupt service controlled by a software time manager. The smaller the period of the interrupt, the better the precision of the RTOS, the more it overloads the CPU, and though reduces the overall efficiency of the RTOS. In this paper, we propose to drastically reduce these overheads by migrating the time management service of Xenomai into a configurable hardware component to relieve the CPU. The hardware component is implemented in a Field Programmable Gate Array coupled to the CPU. This work was achieved in a Master degree project where students could apprehend many fields of embedded systems: RTOS programming, hardware design, performance evaluation, etc.