Pio Balmelli

A 25 MS/s 14 b 200 mW /spl Sigma//spl Delta/ modulator in 0.18 /spl mu/m CMOS

The design of a fifth-order 4-b quantizer single-loop /spl Sigma//spl Delta/ modulator is presented that achieves 25-MS/s conversion rate with 84 dB of dynamic range and 82 dB of signal-to-noise ratio. Implemented in a 0.18-/spl mu/m CMOS technology, the 0.95-mm/sup 2/ chip has a power consumption of 200 mW from a 1.8-V supply.

A Low-EMI 3-W Audio Class-D Amplifier Compatible With AM/FM Radio

A 3-W audio class-D amplifier compatible with AM/FM radio while requiring minimal external filtering is presented. The amplifier uses driver slew rate control to reduce electromagnetic interference (EMI) in the FM band and digital modulation to spread the PWM common-mode signal and place a null at the tuned AM channel. Two original feedback techniques are employed to linearize the H-bridge. One cancels signal-dependent propagation delays in the H-bridge to improve harmonic distortion and eliminate high-frequency noise folding into the audio band. The second technique boosts the power supply rejection ratio to simplify and reduce the cost of supply filters. The amplifier system, implemented in a standard 110-nm CMOS process, operates with a supply voltage ranging from 2.7 to 6.6 V and achieves an SNR of 95 dB and 85% efficiency.

Linearization of class D amplifiers

Signal dependent propagation delay and supply modulation are among the major sources of performance deterioration in class D amplifiers. More so in the case where the control of the common-mode EMI of a Class D amplifier utilizes DSP-based signal spreading techniques and requires the switching amplifier to be “linear” to avoid folding the high frequency spectrum into the audio band. This paper reviews the sources of nonlinearity and describes two original solutions based on analog feedback techniques for a 3W audio amplifier that were implemented in a 110 nm CMOS process.