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Featured researches published by Po-Jung Tseng.


IEEE Transactions on Industrial Electronics | 2015

DSP-Based Interleaved Buck Power Factor Corrector With Adaptive Slope Compensation

Cheng-Yan Yang; Yu-Chen Liu; Po-Jung Tseng; Tian-Fu Pan; Huang-Jen Chiu; Yu-Kang Lo

This paper introduces the adaptive slope compensation method into the digital clamping current control at various input voltages to improve the power factor (PF) and the total harmonic distortion (THD) of the universal input. The controller conducts a phase-management mechanism for various input voltages and load conditions to raise the circuit conversion efficiency. The optimal switching timing for one- and two-phase operations can be determined from the power loss distribution. A digital signal processor chip TMS320F28035 is used to implement the digital platform. A 300-W laboratory prototype with a universal line voltage 80-V dc output voltage is designed and tested to verify the feasibility. The values of efficiency from light load (10% of rated power) to full load at 115- and 230-V inputs are greater than 95%. PF values from medium to full load are greater than 0.94. Input current harmonics also meet the norm of IEC 61000-3-2 Class D.


International Journal of Circuit Theory and Applications | 2014

Design and implementation of a high-efficiency LiFePO4 battery charger for electric vehicle applications

Huang-Jen Chiu; Yu-Kang Lo; Po-Jung Tseng; Yu-Chen Liu; Yu-Chen Chang; Ym-Min Liao; Kuo-Kuang Jen; Kuo-Sheng Fu; Chih-Hsien Chung; Kun-Feng Chen

This letter studies and implements a high-efficiency LiFePO4 battery charger. The modular design can satisfy the requirements of series/parallel charging for electric vehicle applications. A CC-CC-CV charging scheme is also realized to meet the characteristics of LiFePO4 battery stacks. A 2 kW laboratory prototype is built and tested. The experimental results are shown to verify the feasibility of the proposed scheme. Copyright


ieee international future energy electronics conference | 2013

Study on an interleaved buck power factor corrector with GaNFET and integrated inductor

Chih-Chung Huang; Yu-Chen Liu; Tian-Fu Pan; Po-Jung Tseng; Chia-Hua Chang; Yu-Kang Lo; Huang-Jen Chiu

In this paper, the interleaved buck power factor corrector is analyzed. The control method of clamping current, constant frequency and interleaved phases with 180° is adopted in this converter. The interleaved buck power factor corrector has the properties such as high power density, low input and output current ripples and EMI filter is easy to be designed. In this converter with the interleaved control method, two inductors are integrated into one to have low core loss. The high switching frequency (300kHz) is applied to reduce the circuit size. There are two methods provided to raise the circuit efficiency. One is the usage of wide-bandgap power switches to decrease the switching loss, the other is optimal design for phase management to reduce the circuit loss. Experimental results obtained on a 300-W and 80-V output converter which can operate with universal input is provided.


Journal of The Chinese Institute of Engineers | 2016

Systematic analysis and design of dual-switch Flyback converter

Yeong-Chang Yan; Po-Jung Tseng; Huang-Jen Chiu; Yu-Kang Lo

This paper presents the circuit analysis and design considerations for the dual-switch Flyback converter. The operation modes are individually analyzed and the corresponding state equations are presented accordingly. Also, the design equations for key components are derived. Good agreement can be obtained among the Pspice simulation, the experimental results and the theoretical analysis. The analytic equations are valid not only for full load and continuous conduction-mode condition, but also for critical-mode operation, which meets the design specifications.


international conference on intelligent green building and smart grid | 2014

Circuit component parameters design for dual-switch flyback converter

Yeong-Chang Yan; Po-Jung Tseng; Yu-Kang Lo; Huang-Jen Chiu

For the dual-switch flyback converter operating in CCM condition, each operating mode is established and analyzed, and corresponding state equation is derived in some existing literatures. Since some literatures only use the approximate formulae of single-switch circuit structure to set the circuit component parameters of dual-switch flyback converter, so the designed circuit component values are not precise enough. Based on the operating modes and the state equations of aforementioned literatures, this paper redesigns the circuit component parameters of dual-switch circuit structure, and makes a comparison with of single-switch circuit structure. Finally, the circuit simulation results prove that the circuit component parameters derived in this paper meets requirements.


Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA), 2014 International | 2014

DSP-based interleaved buck power factor corrector

Yu-Chen Liu; Tsan Chen; Po-Jung Tseng; Yu-Kang Lo; Huang-Jen Chiu

An interleaved Buck PFC with digital and clamping current control is proposed in this paper. Inductor current can be operated in CCM or DCM, which depends on different input line voltages and load conditions. The interleaved topology is composed of two Buck converters, which can have higher power density, lower input and output ripple currents and improve input current harmonics. Microprocessor TMS320X228035 is adopted to be the controller to implement clamping current mode control and raise the PF value at universal input. And the phase management can be adopted to lift light-load efficiency. A 300-W/80V-output digital interleaved Buck PFC with universal input and light-load efficiency all greater than 95.5% is implemented. When input voltage is over 115Vrms, the mid-to-full load PF values are all greater than 0.94.


International Journal of Circuit Theory and Applications | 2014

High‐voltage power amplifier for flexible paper speaker applications

Huang-Jen Chiu; Yu-Kang Lo; Yu-Chen Chang; Po-Jung Tseng; Yu-Chen Liu

This paper presents a high-voltage power amplifier for driving flexible paper speaker. Simple circuit complexity and high signal quality can be achieved. The operating principles and design considerations of the studied paper speaker power amplifier are analyzed and discussed. A laboratory prototype is built and tested. The experimental results are shown to verify the studied scheme.


International Journal of Circuit Theory and Applications | 2014

Implementation and design of high-power fast charger for lithium-ion battery pack

Kai-Jun Pai; Ming-De Chien; Chu-Chung Hsieh; Ming-Yao Cheng; Cheng-Kuan Liang; Yu-Kang Lo; Yu-Chen Liu; Po-Jung Tseng

The high-power fast charger HPFC incorporating a power stage with a controlling loop is presented in this paper. A power stage is composed of an inter-leaved boost power factor correction and a DC-DC full-bridge phase-shifted FBPS converter, and that the HPFC can supply a constant-voltage CV or a constant-current CC power to charge a secondary lithium-ion battery pack. In addition, the ripple current can be reduced due to the DC-DC FBPS converter combines with the current-doubler rectifier at HPFCs output side. Also, the controlling loop is equipped with a voltage compensator and a current compensator, and this design is for the sake of HPFC, which can either operate in CV or CC output mode. Moreover, the shut-down situation will be prevented by proposed bi-phase charging controller, when the charging current is adjusted from the fist CC level to the second CC level. Analysis and design considerations of the proposed circuits are presented in details. Experimental results agree well with the theoretical predictions and confirm the validity of the proposed approach. Copyright


ieee international future energy electronics conference | 2013

Study and implementation of a two-phase interleaved bridgeless buck power factor corrector

Yu-Chen Liu; Tian-Fu Pan; Po-Jung Tseng; Chih-Chung Huang; Yu-Kang Lo; Huang-Jen Chiu

In this paper, a new topology of interleaved bridgeless PFC is proposed. Through removing the input rectified diodes and reducing the current stresses on switch devices, circuit conversion efficiency can be improved. The interleaved control method has some merits such as higher power density, lower input and output current ripples and easier design of EMI filter. And detailed operation analyses will be presented as well. A 700-W prototype with universal input and 160-V output is implemented and verified in this article. The efficiency values are all closed to 96% at the conditions of half-load and 115-V or 230-V line input voltage. The values of PF and THD all are greater and smaller than 95% and 5%, respectively, from half-load to full-load conditions. And the THD value is conformed to the norm of IEC61000-3-2(class D).


Power Electronics Conference (IPEC-Hiroshima 2014 - ECCE-ASIA), 2014 International | 2014

Study and implementation of a SEPIC LED driver with adjustable output voltage

Po-Jung Tseng; Yu-Chen Liu; Yu-Kang Lo; Huang-Jen Chiu; Yun-Chu Chiu

This paper presents the study and implementation of an LED driver of which the topology is a SEPIC operated under boundary conduction mode (BCM). The output diode features zero-current switching (ZCS). An Inverse-Buck converter is cascaded at the output for the design of an adjustable output voltage. The stability, efficiency and output ripple of a traditional single-stage converter with wide range of output voltage can be improved. For the dimming circuit, the light sensor and IR sensor are additionally used to detect the brightness and presence of human beings. The studied LED driver can be applied for different numbers of LEDs in a string. And the intelligent dimming system can save the energy and extend the applications. Finally, a 126-W laboratory prototype is implemented and verified with the simulations and theoretical analysis. The input voltage ranges from 90Vac to 130Vac and the output voltage can be changed from 25 V to 45 V. The efficiency can achieve 87% at full load condition.

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Huang-Jen Chiu

National Taiwan University of Science and Technology

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Yu-Kang Lo

National Taiwan University of Science and Technology

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Yu-Chen Liu

National Taiwan University of Science and Technology

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Jing-Yuan Lin

National Taiwan University of Science and Technology

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Tian-Fu Pan

National Taiwan University of Science and Technology

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Chih-Chung Huang

National Taiwan University of Science and Technology

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Chung-Yi Lin

National Taiwan University of Science and Technology

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Shih-Jen Cheng

National Taiwan University of Science and Technology

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Trong-Nha Quang

National Taiwan University of Science and Technology

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Yao-Ching Hsieh

National Sun Yat-sen University

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