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Dive into the research topics where Pramod Kumar Meher is active.

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Featured researches published by Pramod Kumar Meher.


IEEE Transactions on Very Large Scale Integration Systems | 2013

CORDIC Designs for Fixed Angle of Rotation

Pramod Kumar Meher; Sang Yoon Park

Rotation of vectors through fixed and known angles has wide applications in robotics, digital signal processing, graphics, games, and animation. But, we do not find any optimized coordinate rotation digital computer (CORDIC) design for vector-rotation through specific angles. Therefore, in this paper, we present optimization schemes and CORDIC circuits for fixed and known rotations with different levels of accuracy. For reducing the area- and time-complexities, we have proposed a hardwired pre-shifting scheme in barrel-shifters of the proposed circuits. Two dedicated CORDIC cells are proposed for the fixed-angle rotations. In one of those cells, micro-rotations and scaling are interleaved, and in the other they are implemented in two separate stages. Pipelined schemes are suggested further for cascading dedicated single-rotation units and bi-rotation CORDIC units for high-throughput and reduced latency implementations. We have obtained the optimized set of micro-rotations for fixed and known angles. The optimized scale-factors are also derived and dedicated shift-add circuits are designed to implement the scaling. The fixed-point mean-squared-error of the proposed CORDIC circuit is analyzed statistically, and strategies for reducing the error are given. We have synthesized the proposed CORDIC cells by Synopsys Design Compiler using TSMC 90-nm library, and shown that the proposed designs offer higher throughput, less latency and less area-delay product than the reference CORDIC design for fixed and known angles of rotation. We find similar results of synthesis for different Xilinx field-programmable gate-array platforms.


international symposium on circuits and systems | 2009

New approach to LUT implementation and accumulation for memory-based multiplication

Pramod Kumar Meher

A new approach to look-up-table (LUT) implementation for memory-based multiplication is presented, where the memory-size is reduced to half at the cost of some increase in combinational circuit complexity. The proposed design offers a saving of nearly 42% area and 38% area-delay product (ADP) at the cost of 6% increase in computational delay for memory-based multiplication of 8-bit inputs with 16-bit coefficient. For high-precision multiplication, a shift-save-accumulation scheme is proposed to accumulate the LUT outputs corresponding to the segments of input-operand, which requires nearly 1.5 times more area, but offers more than twice the throughput and nearly two-third the ADP of direct shift-accumulation approach.


international midwest symposium on circuits and systems | 2013

A fast 8×8 integer Tchebichef transform and comparison with integer cosine transform for image compression

Soni Prattipati; S. Ishwar; M.N.S. Swamy; Pramod Kumar Meher

Presently, there is an undeniable need for novel transform coding techniques promising improved reconstruction and reduced computational complexity in the field of image and data compression. Discrete Tchebichef transform (DTT), though possessing valuable properties like energy compaction, is a potentially unexploited polynomial-based orthogonal transform, compared to the much popular Discrete Cosine transform (DCT). Specifically, integer DCT is widely used in the field of video compression in view of its ease of computation and acceptable performance. However, specific features of the image, such as the structure and content, profoundly influence the quality of the reconstructed image after decompression. This paper focuses on identifying areas where integer DTT might be an alternative to integer DCT for image compression. An integer-transform for the fast computation of 8×8 DTT that reduces the computational complexity significantly is proposed. The image compression performance of integer DTT and integer DCT are evaluated and compared.


Journal of Signal and Information Processing | 2011

Improved Comb Filter based Approach for Effective Prediction of Protein Coding Regions in DNA Sequences

Jayakishan Meher; Pramod Kumar Meher; Gananath Dash

The prediction of protein coding regions in DNA sequences is an important problem in computational biology. It is observed that nucleotides in the protein coding regions or exons of a DNA sequence show period-3 property. Hence identification of the period-3 regions helps in predicting the gene locations within the billions long DNA sequence of eukaryotic cells. The period-3 property exhibited in exons of eukaryotic gene sequences enables signal processing based time-domain and frequency domain methods to predict these regions efficiently. Several approaches based on signal processing tools have, therefore, been applied to this problem, to predict these regions effectively. This paper describes novel and efficient comb filter-based techniques for the prediction of protein coding region based on the period-3 behavior of codon sequences. The proposed method is then validated on Burset/Guigo1996, HMR195 and KEGG standard datasets using various prediction measures. It is shown that cascaded differentiator comb (CDC) filter can be used for prediction of protein coding region with better prediction efficiency, and involves less computational complexity compared with the other signal processing techniques based on period-3 property.


Journal of Signal and Information Processing | 2011

The Role of Combined OSR and SDF Method for Pre-Processing of Microarray Data That Accounts for Effective Denoising and Quantification

Jayakishan Meher; Mukesh Kumar Raval; Pramod Kumar Meher; Gananath Dash

Microarray data is inherently noisy due to the noise contaminated from various sources during the preparation of microarray slide and thus it greatly affects the accuracy of the gene expression. How to eliminate the effect of the noise constitutes a challenging problem in microarray analysis. Efficient denoising is often a necessary and the first step to be taken before the image data is analyzed to compensate for data corruption and for effective utilization for these data. Hence preprocessing of microarray image is an essential to eliminate the background noise in order to enhance the image quality and effective quantification. Existing denoising techniques based on transformed domain have been utilized for microarray noise reduction with their own limitations. The objective of this paper is to introduce novel preprocessing techniques such as optimized spatial resolution (OSR) and spatial domain filtering (SDF) for reduction of noise from microarray data and reduction of error during quantification process for estimating the microarray spots accurately to determine expression level of genes. Besides combined optimized spatial resolution and spatial filtering is proposed and found improved denoising of microarray data with effective quantification of spots. The proposed method has been validated in microarray images of gene expression profiles of Myeloid Leukemia using Stanford Microarray Database with various quality measures such as signal to noise ratio, peak signal to noise ratio, image fidelity, structural content, absolute average difference and correlation quality. It was observed by quantitative analysis that the proposed technique is more efficient for denoising the microarray image which enables to make it suitable for effective quantification.


international symposium on circuits and systems | 2009

Scalable serial-parallel multiplier over GF(2 m ) by hierarchical pre-reduction and input decomposition

Pramod Kumar Meher; Chiou-Yng Lee

This paper presents a novel serial-parallel architecture for finite field multiplications over GF(2m) defined by irreducible trinomials as field polynomials. By recursive decomposition of one of the operands, and hierarchical pre-reduction of the other, it is possible to feed multiple bits in parallel to the serial-parallel structure. The level of parallelism could be doubled after each level of decomposition of the input operand, when high throughput rate is required. One of the key features of the proposed design is that its clock-period remains invariant with the digit-size. The area-complexity of the proposed design increases linearly with the digit-size, which is unlike some of the existing architectures, where area-complexity increases quadratically with the digit-size. Although the proposed structure involves more area compared with some of the existing architectures, since the clock-period of the proposed design is small, it involves significantly less area-delay complexity than the others.


International Journal of Bioinformatics Research and Applications | 2012

New encoded single-indicator sequences based on physico-chemical parameters for efficient exon identification

Jayakishan Meher; Pramod Kumar Meher; Gananath Dash; Mukesh Kumar Raval

The first step in gene identification problem based on genomic signal processing is to convert character strings into numerical sequences. These numerical sequences are then analysed spectrally or using digital filtering techniques for the period-3 peaks, which are present in exons (coding areas) and absent in introns (non-coding areas). In this paper, we have shown that single-indicator sequences can be generated by encoding schemes based on physico-chemical properties. Two new methods are proposed for generating single-indicator sequences based on hydration energy and dipole moments. The proposed methods produce high peak at exon locations and effectively suppress false exons (intron regions having greater peak than exon regions) resulting in high discriminating factor, sensitivity and specificity.


International Journal of Computers and Applications | 2013

Efficient Systolic Architecture for VLSI Realization of 2-D Hartley-Like Transform

Gouri S. Maharana; Pramod Kumar Meher; Basant K. Mohanty

Abstract In this paper, we present a composite systolic structure for VLSI realization of two-dimensional (2-D) separable Hartley-like transform (HLT). We have shown that using the separable nature of 2-D HLT, one can compute it in two pipeline stages by row–column decomposition. Besides, we have presented two linear systolic structures for the computation of those two stages and shown that both the types of linear systolic structures can be orthogonally interspersed together to derive a composite structure for 2-D HLT, which does not require any of transposition buffer. The proposed structure provides two benefits: Neither does it require any on-chip memory for transposition of intermediate matrices nor it involves any delay to perform transposition operation. The proposed design for N × N HLT provides a throughput-rate of N HLT coefficients in every cycle, since row and column processing could be performed concurrently for adjacent pairs of input matrices. Unlike the 2-D discrete Fourier transform (DFT) structures, the proposed structure does not require any complex arithmetic operations. It is comprised of 2N2 locally connected simple processing elements (PEs), where each PE consists of one real-value multiplier and one real-value adder. The complete structure, therefore, involves 2N2 multipliers and the same number of adders, while the 2-D DFT of the same size requires 8N2 multipliers and 8N2 adders.


Journal of Signal and Information Processing | 2015

A Comparison of Integer Cosine and Tchebichef Transforms for Image Compression Using Variable Quantization

Soni Prattipati; M.N.S. Swamy; Pramod Kumar Meher


American Journal of Molecular Biology | 2011

A reduced computational load protein coding predictor using equivalent amino acid sequence of DNA string with period-3 based time and frequency domain analysis

Jayakishan Meher; Gananath Dash; Pramod Kumar Meher; Mukesh Kumar Raval

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Basant K. Mohanty

Jaypee University of Engineering and Technology

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Vinod A. Prasad

Nanyang Technological University

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Chiou-Yng Lee

Lunghwa University of Science and Technology

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