Praveen Jaraut

Digitally assisted analog predistortion technique for power amplifier

This paper presents a digitally assisted analogpredistortion scheme for linearization of high power amplifier. Taking advantage of recent available digital signal processing solutions, the proposed method reduces hardware requirement of conventional analog predistorter by alleviating the need of Vector multiplier, hybrid 900 coupler and delay lines. Proposed method provides flexibility in terms of digitally compensation of delay, gain and phase control of signal. The proof-of-concept of method is presented for reducing odd-order intermodulation distortion (IMD). A better performance of 11-db reduction as compared to conventional analog predistorter in terms of 3rd IMD is achieved for two-tone test signal centered at frequency 2000 MHz and 2020 MHz.

2D curtailed harmonic memory polynomial for reduced complexity in concurrent dual-band modelling and digital predistortion with the second band at harmonic frequency

Multi-band transmitter systems are evolving to support the smooth transition from 4G to 5G communication systems. Moreover, recent developments of multi-band and ultra-wideband power amplifiers have led to a possible scenario where the second carrier signal is transmitted at the harmonic frequency of the first carrier signal. This results in harmonic interference from the first carrier signal as well as additional cross-modulation and intermodulation distortion (IMD) components, which cannot be filtered out. The computational and memory requirements for digital predistortion (DPD) in such scenario increase drastically to include all interference terms. This study presents a novel two-dimensional curtailed harmonic memory polynomial (2D-CHMP) model to capture harmonic interferences, cross-modulation and IMDs. The model complexity and memory requirement of 2D-CHMP are very less as compared to the state-of-the-art two-dimensional harmonic memory polynomial (2D-HMP) model. For proof-of-concept, it is shown with two different measurement setups that the proposed 2D-CHMP DPD provides similar linearisation performances as compared to the 2D-HMP DPD with less number of coefficients and computational complexity. As a study, it is shown that the proposed model can be further adapted to a low-precision (low-bit) environment by utilising principal component analysis.

Harmonically Related Concurrent Tri-Band Behavioral Modeling and Digital Predistortion

With the increase in demands of the multi-band and ultra-wideband-based transmitters, the research interest in power amplifiers (PAs) is moving toward the designing of multi-band and ultra-wideband PAs. This leads to unprecedented challenges, such as the possibility of multiband transmission at harmonic frequencies. This brief investigates and presents the novel digital predistortion (DPD) models for linearization of a previously uninvestigated case of concurrent tri-band PA at harmonic frequencies. This brief analyzes the intermodulation terms which are producing harmonic distortions and proposes 3-D harmonic memory polynomial (3D-HMP) and harmonic volterra spline (3D-HVS) models for mitigation of in-band harmonic, cross-modulation, and intermodulation distortions. The results show that the proposed 3D-HMP and 3D-HVS DPD models have linearization performance in terms of adjacent channel power ratio below −50 dBc.

Complexity and numerical stability investigation in concurrent dual-band modeling of ultra-wideband power amplifiers for harmonically related signals

This paper investigates the issues related to numerical stability and complexity of models, which are used to remove the interference in concurrent dual-band transmitters with ultra-wideband power amplifier at harmonic frequencies while providing comparative analysis. The principal component analysis technique is utilized as a solution to maintain numerical stability and reduce complexity in these models. A FPGA based test-bench is used as a measurement setup.

Novel implementation topology for three level delta sigma modulation based transmitter

This paper presents a novel implementation topology of three- level delta sigma modulation (DSM) schemes. The delta sigma modulation converts envelope-varying signal to pulse modulated form, which can be applied directly to high efficient switch mode power amplifiers (SMPA). Multilevel DSM is proposed over bi-level DSM to enhance coding efficiency (CE) and signal to noise and distortion ratio (SNDR). However the quality of such multilevel pulse signal is degraded when signal is amplified using power amplifiers, which are nonlinear near saturation region. It defeats some of the advantages of using multi-level DSM. This paper proposes a topology that converts three-level signal to a bi-level level signal, which retains benefits of three-level DSM with less-distortion due to bi-level stage implementation when applied to PA.