Premysl Sucha

TORSCHE Scheduling toolbox for Matlab

This paper presents a Matlab based scheduling toolbox TORSCHE (time optimization of resources, scheduling). The toolbox offers a collection of data structures that allow the user to formalize various off-line and online scheduling problems. Algorithms are simply implemented as Matlab functions with fixed structure allowing users to implement new algorithms. A more complex problem can be formulated as an integer linear programming problem or satisfiability of Boolean expression problem. The toolbox is intended mainly as a research tool to handle control and scheduling co-design problems. Therefore, we provide an interface to a real-time Matlab/Simulik based simulator TrueTime and a code generator allowing to generate parallel code for FPGA

Scheduling of iterative algorithms on FPGA with pipelined arithmetic unit

This paper presents a scheduling technique for a library of arithmetic logarithmic modules for FPGA illustrated on a RLS filter for active noise cancellation. The problem under assumption is to find an optimal periodic cyclic schedule satisfying the timing constraints. The approach is based on a transformation to monoprocessor cyclic scheduling with precedence delays. We prove that this problem is NP-hard and we suggest a solution based on integer linear programming that allows to minimize completion time. Finally experimental results of optimized RLS filter are shown.

Solving the Resource Constrained Project Scheduling Problem using the parallel Tabu Search designed for the CUDA platform

The Resource Constrained Project Scheduling Problem, which is considered to be difficult to tackle even for small instances, is a well-known scheduling problem in the operations research domain. To solve the problem we have proposed a parallel Tabu Search algorithm to find high quality solutions in a reasonable time. We show that our parallel Tabu Search algorithm for graphics cards (GPUs) outperforms other existing Tabu Search approaches in terms of quality of solutions and the number of evaluated schedules per second. Moreover, the algorithm for graphics cards is about 10.5/42.7 times faster (J90 benchmark instances) than the optimized parallel/sequential algorithm for the Central Processing Unit (CPU). The same quality of solutions is achieved up to 5.4/22 times faster in comparison to the parallel/sequential CPU algorithm respectively. The advantages of the GPU version arise from the sophisticated data-structures and their suitable placement in the device memory, tailor-made methods, and last but not least the effective communication scheme. The parallel Tabu Search for the Resource Constrained Project Scheduling Problem.To accelerate the algorithm the CUDA optimized version was implemented.A new resources evaluation algorithm was proposed.Promising results in terms of performance and quality of solutions.

An efficient configuration methodology for time-division multiplexed single resources

Complex contemporary systems contain multiple applications, some which have firm real-time requirements while others do not. These applications are deployed on multi-core platforms with shared resources, such as processors, interconnect, and memories. However, resource sharing causes contention between sharing applications that must be resolved by a resource arbiter. Time-Division Multiplexing (TDM) is a commonly used arbiter, but it is challenging to configure such that the bandwidth and latency requirements of the real-time resource clients are satisfied, while minimizing their total allocation to improve the performance of non-real-time clients. This work addresses this problem by presenting an efficient TDM configuration methodology. The five main contributions are: 1) An analysis to derive a bandwidth and latency guarantee for a TDM schedule with arbitrary slot assignment, 2) A formulation of the TDM configuration problem and a proof that it is NP-hard, 3) An integer-linear programming model that optimally solves the configuration problem by exhaustively evaluating all possible TDM schedule sizes, 4) A heuristic method to choose candidate schedule sizes that substantially reduces computation time with only a slight decrease in efficiency, 5) An experimental evaluation of the methodology that examines its scalability and quantifies the trade-off between computation time and total allocation for the optimal and the heuristic algorithms. The approach is also demonstrated on a case study of a HD video and graphics processing system, where a memory controller is shared by a number of processing elements.

Scheduling of tasks with precedence delays and relative deadlines framework for time-optimal dynamic reconfiguration of FPGAs

This paper is motivated by existing architectures of field programmable gate arrays (FPGAs). To facilitate the design process we present an optimal scheduling algorithm using a very universal framework, where tasks are constrained by precedence delays and relative deadlines. The precedence relations are given by an oriented graph, where tasks are represented by nodes. Edges in the graph are related either to the minimum time or to the maximum time elapsed between the start times of the tasks. This framework is used to model the runtime dynamic reconfiguration, synchronization with an on-chip processor and simultaneous availability of arithmetic units and SRAM memory. The NP-hard problem of finding an optimal schedule satisfying the timing and resource constraints while minimizing the makespan Cmax, is solved using two approaches. The first one is based on integer linear programming and the second one is implemented as a branch and bound algorithm. Experimental results show the efficiency comparison of the ILP and branch and bound solutions

Efficient FPGA Implementation of Equalizer for Finite Interval Constant Modulus Algorithm

This paper deals with the optimization of iterative algorithms with matrix operations or nested loops for hardware implementation in Field Programmable Gate Arrays (FPGA), using Integer Linear Programming (ILP). The method is demonstrated on an implementation of the Finite Interval Constant Modulus Algorithm, proposed for 4G communication systems. We used two pipelined arithmetic ibraries based on the logarithmic number system or the floating-point number system, using the widely known IEEE format for the floating-point calculations required in the algorithm. Traditional approaches to the scheduling of nested loops lead to a relatively large code, which is unsuitable for FPGA implementation. This paper presents a new high-level synthesis methodology, which models both, iterative loops and imperfectly nested loops, by means of the system of linear inequalities. Moreover, memory access is considered as an additional resource constraint. Since the solutionns of ILP formulated problems are known to be computationally intensive, important part of the article is devoted to the reduction of the problem size.

Efficient Algorithm for Jitter Minimization in Time-Triggered Periodic Mixed-Criticality Message Scheduling Problem

The current research in real-time scheduling focuses mostly on the certification of functionalities with respect to safety requirements under conservative assumptions or to achieve efficient resource utilization but with optimistic assumptions. With growing system complexity, the safety certification is becoming hard, especially in event-triggered environments. In time-triggered environments, the network nodes are synchronized by clocks and follow a static schedule hence they are easily certifiable. However, the time-triggered paradigm has two disadvantages. The first one is its general non-flexibility (e.g. message retransmission, efficient resource usage) and the second one is the need for an efficient scheduling algorithm producing the schedule. In this paper, we propose a solution to both of these issues. To address the first disadvantage, we propose a method for non-preemptive message retransmission in time-triggered environments while preserving the efficient use of resources. Based on the message criticality we allow a certain number of retransmissions. The observed prolongation of the processing time of a highly critical message is compensated by skipping transmission of less critical messages. Static schedules then contain all alternatives caused by the retransmissions that can occur during a run time execution. Schedules conform with certification requirements imposed on the highly critical messages while preserving the efficient use of resources. To address the second disadvantage, we propose a novel heuristic scheduling algorithm with an unscheduling step for solving large instances of periodic message scheduling problem. The message periodicity is assumed to be a power of two and the objective is to minimize the maximal jitter. The efficiency of the approach is demonstrated on problem instances with up to 2000 messages.

Energy Optimization of Robotic Cells

This study focuses on the energy optimization of industrial robotic cells, which is essential for sustainable production in the long term. A holistic approach that considers a robotic cell as a whole toward minimizing energy consumption is proposed. The mathematical model, which takes into account various robot speeds, positions, power-saving modes, and alternative orders of operations, can be transformed into a mixed-integer linear programming formulation that is, however, suitable only for small instances. To optimize complex robotic cells, a hybrid heuristic accelerated by using multicore processors and the Gurobi simplex method for piecewise linear convex functions is implemented. The experimental results showed that the heuristic solved 93% of instances with a solution quality close to a proven lower bound. Moreover, compared with the existing works, which typically address problems with three to four robots, this study solved real-size problem instances with up to 12 robots and considered more optimization aspects. The proposed algorithms were also applied on an existing robotic cell in Škoda Auto. The outcomes, based on simulations and measurements, indicate that, compared with the previous state (at maximal robot speeds and without deeper power-saving modes), the energy consumption can be reduced by about 20% merely by optimizing the robot speeds and applying power-saving modes. All the software and generated datasets used in this research are publicly available.

A GPU Algorithm Design for Resource Constrained Project Scheduling Problem

This work proposes a GPU algorithm for a combinatorial problem known in literature as Resource Constrained Project Scheduling Problem. To solve this NP-hard problem, Tabu Search meta-heuristic is selected. All computations are performed on the GPU to minimize required communication bandwidth between the GPU and the CPU. In addition, new evaluation algorithm and effective Tabu List implementation are designed especially for GPUs. Achieved results show that the proposed GPU solution outperforms the equivalent CPU version in both quality of solutions and performance speedup.

Robust scheduling for manufacturing with energy consumption limits

Our work considers a scheduling problem in which manufacturing companies with large energy demand are obligated to comply with total energy consumption limits in specified time intervals, e.g. 15 minutes. Moreover, the problem is complicated by the fact that in reality the production schedules are not executed exactly as planned due to unexpected disturbances such as machine breakdowns or material unavailability. Therefore, the goal is to find a robust schedule which guarantees that the energy consumption limits are not violated if the start times of operations are arbitrary delayed within a given limit. To circumvent the problem of an exponential number of constraints in the mixed integer linear programming formulation, we propose an exact algorithm based on a decomposition approach. The decomposition approach exploits the fact that the robustness of a given schedule can be checked in a pseudo-polynomial time. We evaluated the proposed algorithm on instances with varying bound of the start times delays.