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Dive into the research topics where Primit Parikh is active.

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Featured researches published by Primit Parikh.


Proceedings of the IEEE | 2002

AlGaN/GaN HEMTs-an overview of device operation and applications

Umesh K. Mishra; Primit Parikh; Yifeng Wu

Wide bandgap semiconductors are extremely attractive for the gamut of power electronics applications from power conditioning to microwave transmitters for communications and radar. Of the various materials and device technologies, the AlGaN/GaN high-electron mobility transistor seems the most promising. This paper attempts to present the status of the technology and the market with a view of highlighting both the progress and the remaining problems.


Applied Physics Letters | 1997

PHOTOLUMINESCENCE STUDY OF HYDROGENATED ALUMINUM OXIDE-SEMICONDUCTOR INTERFACE

Song S. Shi; Evelyn L. Hu; Jing-Ping Zhang; Ying-Lan Chang; Primit Parikh; Umesh K. Mishra

We present a study of oxide–semiconductor interfaces formed by wet thermal oxidation of a thin epitaxial AlAs layer. Photoluminescence (PL) from a quantum well in close proximity to the interface is monitored before and after oxidation. The normalized PL intensity was found to decrease roughly in proportion to the degree of completeness of the oxidation. The diminishing luminescence is attributed to the presence of trap states formed at the oxide–semiconductor interface formed during the oxidation process; hydrogen ion treatment is effective in the partial restoration of the luminescence. In addition to the traps, the oxidation process also “disorders” the material within ∼15 nm from the semiconductor–oxide interface, as revealed by transmission electron micrographs.


IEEE Electron Device Letters | 1997

GaAs MESFET's on a truly insulating buffer layer: demonstration of the GaAs on insulator technology

Primit Parikh; Prashant Chavarkar; Umesh K. Mishra

We demonstrate for the first time a GaAs on insulator (GOI) technology, with aluminum oxide (Al/sub 2/O/sub 3/) formed by the wet oxidation of AlAs as the insulating buffer layer. The insulating buffer gives excellent charge control and eliminates substrate leakage current. The first results of GOI technology include 1.5-/spl mu/m gate length GOI MESFETs with f/sub /spl tau//=9 GHz and f/sub max/=45 GHz.


device research conference | 2011

Total GaN solution to electrical power conversion

Yifeng Wu; Robert Coffie; N. Fichtenbaum; Yuvaraj Dora; Chang Soo Suh; L. Shen; Primit Parikh; Umesh K. Mishra

We present the first 600V-class, total GaN solution for electrical power conversion applications. A 220V–400V boost converter using a GaN transistor and a GaN diode with fast & clean hard-switched waveforms has been demonstrated. The conversion efficiency was >99.1% at 100 kHz and >98.2% at 800 kHz.


international electron devices meeting | 2014

600 V JEDEC-qualified highly reliable GaN HEMTs on Si substrates

Toshihide Kikkawa; Tsutomu Hosoda; Kenji Imanishi; Ken Shono; Kazuo Itabashi; Tsutomu Ogino; Yasumori Miyazaki; Akitoshi Mochizuki; Kenji Kiuchi; Masahito Kanamura; Masamichi Kamiyama; Shiniichi Akiyama; Susumu Kawasaki; Takeshi Maeda; Yoshimori Asai; Yifeng Wu; Kurt Smith; John Gritters; Peter Smith; Saurabh Chowdhury; Dixie Dunn; Martin Aguilera; Brian L. Swenson; Ron Birkhahn; L. McCarthy; L. Shen; Jim McKay; Heber Clement; Jim Honea; Sung Yea

In this paper, we demonstrate 600 V highly reliable GaN high electron mobility transistors (HEMTs) on Si substrates. GaN on Si technologies are most important for the mass-production at the Si-LSI manufacturing facility. High breakdown voltage over 1500 V was confirmed with stable dynamic on-resistance (RON) using cascode configuration package. These GaN HEMT on Si based cascode packages have passed the qualification based on the standards of the Joint Electron Devices Engineering Council (JEDEC) (1-5) for the first time. High voltage acceleration test was performed up to 1150 V. Even considering most conservative failure mechanism, mean time to failure (MTTF) of over 1×107 hours at 600 V was predicted at 80°C. Additional conclusion is that conventional packages such as TO-220 are still suitable for high speed circuit application without using a specific gate driver. Ultimately GaN will significantly reduce conversion losses endemic in all areas of electricity conversion, ranging from power supplies to PV inverters to motion control to electric vehicles, enabling consumers, utilities and governments to contribute towards a more energy efficient world.


international reliability physics symposium | 2015

Commercialization and reliability of 600 V GaN power switches

Toshihide Kikkawa; Tsutomu Hosoda; Ken Shono; Kenji Imanishi; Yoshimori Asai; Yifeng Wu; L. Shen; Kurt Smith; Dixie Dunn; Saurabh Chowdhury; Peter Smith; John Gritters; L. McCarthy; Ronald Barr; Rakesh K. Lal; Umesh K. Mishra; Primit Parikh

The reliability of 600 V GaN power switches, fabricated in a silicon CMOS foundry, has been demonstrated. JEDEC qualification of cascode packages and the long term reliability of GaN power switches has been estimated for the first and shown to be greater than a million hours. Excellent switched/dynamic on-resistance up to 1000 V and breakdown voltage over 1500 V indicate the suitability of these devices for switching up to 480 V. Detailed data of high temperature reverse bias (HTRB) test is shown. High temperature DC stress test and high voltage off-state stress tests also corroborate the high reliability of these devices. This suite of initial, JEDEC & accelerated stress tests show that GaN-on-silicon power switches are ready for many commercial and industrial applications, would significantly reduce switching losses and system size and will impact all areas of electricity conversion, ranging from tablet chargers to photovoltaic inverters and electric vehicles.


device research conference | 1996

First demonstration of GaAs on insulator (GOI) technology

Primit Parikh; Prashant Chavarkar; Umesh K. Mishra

Summary form only given. There is increased interest in the steam oxidation of AlAs, following the pioneering work done at University of Illinois. We report the first demonstration of GaAs On Insulator (GOI) technology using Al/sub 2/O/sub 3/ formed by the steam oxidation of AlAs as the buffer insulator. 500 /spl Aring/ of AlAs was grown on a GaAs buffer, followed by a 100 /spl Aring/ spacer (Al/sub 0.3/GaAs), 2000 /spl Aring/ channel (n-GaAs), 30 /spl Aring/ etch stop (Al/sub 0.7/GaAs) and the 200 /spl Aring/ n/sup +/ ohmic layer for contacts (InAs-GaAs superlattice). The three-terminal DC I-V characteristics of a GOI MESFET indicate that the device has negligible output conductance. The peak g/sub m/ is over 180 mS/mm at a drain current level of 320 mA/mm. The source and drain ohmic contact resistance is 0.2 /spl Omega/-mm and the knee voltage is about 1.2 volts. The f/sub T/ and f/sub max/ of this device are 9 GHz (which is close to the expected value for a 1.5 /spl mu/m gatelength device) and 44 GHz respectively. These results indicate that Al/sub 2/O/sub 3/ is a possible buffer layer insulator for III-V based FET technology and can form an enabling technology for a low substrate leakage, high output resistance GOI FETs, attractive for low power electronics.


IEEE Electron Device Letters | 1996

A new FET-based integrated circuit technology: the SASSFET

Primit Parikh; W.N. Jiang; Prashant Chavarkar; K. Kiziloglu; Bernd Keller; S. P. DenBaars; Umesh K. Mishra

The super self-aligned submicron single-metal FET (SASSFET), a FET-based integrated circuit technology suitable for fabrication of high-speed GaAs and InP circuits, is demonstrated. With nonalloyed source and drain contacts realized by MOCVD regrowth, the SASSFET is a uniform, dense, selfaligned, single-metal technology that achieves submicron dimensions with optical lithography. A 0.4 /spl mu/m gate length junction HFET fabricated with the SASSFET technology has a transconductance of 380 mS/mm and a good high-frequency performance with f/sub /spl tau// of 45 GHz and f/sub max/ of 80 GHz.


compound semiconductor integrated circuit symposium | 2016

650 V Highly Reliable GaN HEMTs on Si Substrates over Multiple Generations: Matching Silicon CMOS Manufacturing Metrics and Process Control

Saurabh Chowdhury; Yifeng Wu; L. Shen; Kurt Smith; Peter Smith; Toshihide Kikkawa; John Gritters; L. McCarthy; Rakesh K. Lal; Ronald Barr; Zhan Wang; Umesh K. Mishra; Primit Parikh

Manufacturing readiness of the worlds first highly reliable 650V GaN HEMT is demonstrated with high process capability (CpK>1.6) for leakage and on resistance. This technology was developed in a Si-CMOS compatible 6-inch foundry and has been demonstrated with over one thousand wafers worth of data spread over two generations of technology nodes covering multiple products and packages collected during ramp up post qualification. Silicon manufacturing processes are employed including gold-free processes that avoid the use of evaporation/liftoff typical to compound semiconductors. Probe yield and Line yield for the GaN process now matches mature Si-CMOS process running in the same fabrication facility. Extended qualification results beyond JEDEC standard are also shown for GaN products for the first time. Products in cascode configuration were tested. Wide bandgap high speed and high voltage GaN devices significantly reduce the system size and improve energy efficiency of power conversion in all areas of electricity conversion, ranging from PV inverters to electric vehicles making the above results significant and making GaN high volume production a reality.


IEEE Transactions on Microwave Theory and Techniques | 1998

Record power-added-efficiency, low-voltage GOI (GaAs on insulator) MESFET technology for wireless applications

Primit Parikh; James Ibbetson; Umesh K. Mishra; Daniel P. Docter; Minh Le; Kursad Kiziloglu; D. Grider; J. Pusl; D. Widman; L. Kehias; T. Jenkins

A record high power added efficiency is obtained from a GaAs On Insulator (GOI) MESFET. Al/sub 2/O/sub 3/ obtained by the wet oxidation of Al/sub 0.98/GaAs in steam, is used as the insulating buffer layer. The insulating buffer results in elimination of buffer leakage and enhanced charge control. 0.35 /spl mu/m gate length GOI MESFETs exhibit a PAE of 72% at a drain voltage of 3 Volts at 4 GHz.

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Yifeng Wu

University of California

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Rakesh K. Lal

University of California

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L. Shen

University of California

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Robert Coffie

University of California

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L. McCarthy

University of California

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James Ibbetson

University of California

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