Pushparajah Rajaguru
University of Greenwich
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Publication
Featured researches published by Pushparajah Rajaguru.
Microelectronics Reliability | 2015
Pushparajah Rajaguru; Hua Lu; C. Bailey
This paper discusses the design for reliability of a sintered silver structure in a power electronic module based on the computational approach that composed of high fidelity analysis, reduced order modelling, numerical risk analysis, and optimisation. The methodology was demonstrated on sintered silver interconnect sandwiched between silicon carbide chip and copper substrate in a power electronic module. In particular, sintered silver reliability due to thermal fatigue material degradation is one of the main concerns. Thermo-mechanical behaviour of the power module sintered silver joint structure is simulated by finite element analysis for cyclic temperature loading profile in order to capture the strain distribution. The discussion was on methods for approximate reduced order modelling based on interpolation techniques using Kriging and radial basis functions. The reduced order modelling approach uses prediction data for the thermo-mechanical behaviour. The fatigue lifetime of the sintered silver interconnect and the warpage of the interconnect layer was particular interest in this study. The reduced order models were used for the analysis of the effect of design uncertainties on the reliability of the sintered silver layer. To assess the effect of uncertain design data, a method for estimating the variation of reliability related metrics namely Latin Hypercube sampling was utilised. The product capability indices are evaluated from the distributions fitted to the histogram resulting from Latin Hypercube sampling technique. A reliability based design optimisation was demonstrated using Particle Swarm Optimisation algorithm for constraint optimisation task consists of optimising two different characteristic performance metrics such as the thermo-mechanical plastic strain accumulation per cycle on the sintered layer and the thermally induced warpage.
Microelectronics Reliability | 2015
Pushparajah Rajaguru; Hua Lu; C. Bailey
This paper reviewed the existing damage evolution models in the literature for solder layer in microelectronics and then proposed a two dimensional approximate time dependent damage indicator model for Sn3.5Ag type lead free solder layer in power electronic module application. The proposed time dependent damage indicator model is influenced by inelastic strain from microstructural evolution Anand viscoplastic model. The experimental evaluation of parameter values of the proposed damage indicator model was not feasible. Hence, we adopted a numerical approximation methodology to extract the parameter values of the damage model. A MatLab code was generated to simulate the stress versus strain curve of the solder layer during the thermal variance loading. A data from public domain for crack initiation and crack propagation of SnAg solder layer was also utilised to estimate the parameter values of damage indicator model. The developed approximate time dependent damage model was numerically compared with a damage model in the literature based on Coffin Manson and Paris law fatigue model for prediction accuracy.
Journal of Algorithms & Computational Technology | 2010
T. Tilford; M. Ferenets; James E. Morris; A. Krumme; Sumanth Kumar Pavuluri; Pushparajah Rajaguru; Marc Phillipe Yves Desmulliez; C. Bailey
A particle swarm optimisation approach is used to determine the accuracy and experimental relevance of six disparate cure kinetics models. The cure processes of two commercially available thermosetting polymer materials utilised in microelectronics manufacturing applications have been studied using a differential scanning calorimetry system. Numerical models have been fitted to the experimental data using a particle swarm optimisation algorithm which enables the ultimate accuracy of each of the models to be determined. The particle swarm optimisation approach to model fitting proves to be relatively rapid and effective in determining the optimal coefficient set for the cure kinetics models. Results indicate that the singlestep autocatalytic model is able to represent the curing process more accurately than more complex model, with ultimate accuracy likely to be limited by inaccuracies in the processing of the experimental data.
european conference on cognitive ergonomics | 2016
Jose Angel Ortiz Gonzalez; Olayiwola M. Alatise; Li Ran; Philip A. Mawby; Pushparajah Rajaguru; C. Bailey
Fast switching SiC Schottky diodes are known to exhibit significant output oscillations and electromagnetic emissions in the presence of parasitic inductance from the package/module connections. Furthermore, solder pad delamination and wirebond lift-off are common failure modes in high temperature applications. To this end, pressure packages, which obviate the need for wire-bonds and solder/die attach, have been developed for high power applications where reliability is critical like thyristor valves in HVDC line commutated converters. In this paper, SiC Schottky diodes in pressure-packages (press-pack) have been designed, developed and tested. The electrothermal properties of the SiC diode in press-pack have been tested as a function of the clamping force using different thermal contacts, namely molybdenum and Aluminum Graphite. Finite Element Simulations have been used to support the analysis.
Journal of Electronic Packaging | 2013
Pushparajah Rajaguru; Stoyan Stoyanov; Hua Lu; C. Bailey
This paper discusses the design for reliability of a wire bond structure in a power electronic module based on computational approach that integrates methods for high fidelity analysis, reduced order modeling, numerical risk analysis, and optimization. This methodology is demonstrated on a wire bond structure in a power electronic module with the aim of reducing the chance of failure due to the wire bond lift off in a power electronic module. In particular, wire bond reliability of the power module related to the thermal fatigue material degradation of aluminum wire is one of the main concerns. Understanding the performance, reliability, and robustness of wire bond is a key factor for the future development and success of the power electronic module technology. The main focus in this study is on the application of reduced order modeling techniques and the development of the associated models for fast design evaluation and analysis. The discussion is on methods for approximate response surface modeling based on interpolation techniques using Kriging and radial basis functions. The reduced order modeling approach uses prediction data for the electrothermomechanical behavior of the power module wire bond design obtained through nonlinear transient finite element simulations, in particular, for the fatigue lifetime of the aluminum wire attached to the silicon chip and the warpage (displacement) of the wire in the module. These reduced order models are used for the analysis of the effect of design uncertainties on the reliability of these advanced electronics modules. To assess the effect of uncertain design data, different methods for estimating the variation of reliability-related metrics of the wire bond model are researched and tested. Sample-based methods, such as full-scale Monte Carlo and Latin hypercube, and analytical approximate methods, such as first order second moment (FOSM) and point estimation method (PEM), are investigated, and their accuracy is compared. The optimization modeling analyzes the probabilistic nature of the reliability problem of the aluminum wire bond structures under investigation. Optimization tasks with design uncertainty are identified and solved using a particle swarm optimization algorithm. The probabilistic optimization deals with two different characteristic performance metrics of the design, the electrothermomechanical fatigue reliability of the aluminum wire attached to the chip and the thermally induced warpage of the wire in the module structure. The objective in this analysis is to ensure that the design has the required reliability and meets a number of additional requirements.
Ships and Offshore Structures | 2014
Pushparajah Rajaguru; Peter Mason; C. Bailey; Stoyan Stoyanov
This study presents modelling and finite element simulation and the subsequent buckling analysis on the the historic Medway Queen paddle steamer ship which is under reconstruction now. The objective of this study is to assess buckling strength of the hull plate due to the longitudinal stress in the hull plates of the Medway Queen under various sea and live load conditions. A beam finite element analysis with structural elements is utilised to assess shear stress and bending moments of the ship structure. The model predictions for longitudinal stresses in hull plates are combined with buckling assessments on the hull plates in different, judged to be the most critical, locations along the ships length. The structural beam model is utilised to simulate the ships stress behaviour under hogging and sagging conditions with three different wave heights and four sets of live loads. From the longitudinal bending moment and shear force of all 24 simulation cases, extreme locations are identified and critical buckling stress on the plates close to these locations is predicted and compared with actual axial and shear stresses on the hull plate to predict the condition at which the buckling structural failure occurs.
electronics system integration technology conference | 2010
T. Tilford; James E. Morris; M. Ferenets; Pushparajah Rajaguru; Sumanth Kumar Pavuluri; Marc Phillipe Yves Desmulliez; C. Bailey
This work assesses the accuracy of specific numerical models in predicting the cure kinetics of a commercially available isotropic conductive adhesive material. A series of Differential Scanning Calorimetry (DSC) analyses have been performed on the materials to determine fundamental cure data. Cure models have been fitted to these experimental data using both the traditional and Particle Swarm Optimization (PSO) fitting methods. The traditional model fitting approach indicates a significant variation in the activation energy during the cure process. The particle swarm optimization fitting method is able to provide coefficient sets for all cure models assessed. Results obtained with these models are in relatively good agreement with experimental data
Microelectronics Reliability | 2018
Pushparajah Rajaguru; Hua Lu; C. Bailey; Alberto Castellazzi; Vasantha Pathirana; Nishad Udugampola; Florin Udrea
An effort to design and build a prototype LED driver system which is energy efficient, highly compact and with few component count was initiated by a consortium UK universities. The prototype system will be based on Silicon Lateral IGBT (LIGBT) device combined with chip on board technology. Part ofthis effort, finite element modelling and analysis were undertaken in order to mitigate the underfill dielectric breakdown failure and solder interconnect fatigue failure of the LIGBT package structure. Electro-static analysis was undertaken to predict the extreme electric field distribution in the underfill. Based on electro-static analysis, five commercial underfill were selected for thermo-mechanical finite element analysis on solder joint fatigue failure prediction under cyclic loading. A design optimisation analysis was endeavoured to maximise the solder interconnect reliability by utilising a computer model with continuous variable (physical dimensions) and discrete variables (underfill type) and a stochastic optimiser such as multi-objective mixed discrete particle swarm optimisation. From the optimisation analysis best trade off solution are obtained.
international symposium on power semiconductor devices and ic's | 2017
Attahir Murtala Aliyu; Bassem Mouawad; Alberto Castellazzi; Pushparajah Rajaguru; C. Bailey; Vasantha Pathirana; Nishad Udugampola; T. Trajkovic; Florin Udrea
This paper presents a novel chip on board assembly design for an integrated power switch, based on high power density 800V silicon lateral insulated gate bipolar transistor (Si LIGBT) technology. LIGBTs offer much higher current densities (5-lOX), significantly lower leakage currents, lower parasitic device capacitances and gate charge compared to conventional vertical MOSFETs commonly used in LED drivers. The higher voltage ratings offered (up to 1kV), the development of high voltage interconnection between parallel IGBTs, self-isolated nature and absence of termination region unlike in a vertical MOSFET makes these devices ideal for ultra-compact, low bill of materials (BOM) count LED drives. Chip on-board LIGBTs also offer significant advantages over MOSFETs due to high temperatures seen on most of the LED lamp enclosures as the LIGBTs on-state losses increase only marginally with temperature. The design is based on a built-in reliability approach which focuses on a compact LED driver as a case-study of a cost-sensitive large volume production item.
IEEE Transactions on Industrial Electronics | 2017
Jose Angel Ortiz Gonzalez; Olayiwola M. Alatise; Attahir Murtala Aliyu; Pushparajah Rajaguru; Alberto Castellazzi; Li Ran; Philip A. Mawby; C. Bailey
The thermomechanical reliability of SiC power devices and modules is increasingly becoming of interest especially for high-power applications, where power cycling performance is critical. Press-pack assemblies are a trusted and reliable packaging solution that has traditionally been used for high-power thyristor-based applications in FACTS/HVDC, although press-pack IGBTs have become commercially available more recently. These press-pack IGBTs require antiparallel PiN diodes for enabling reverse conduction capability. In these high-power applications, paralleling chips for high current conduction capability is a requirement, hence, electrothermal stability during current sharing is critical. SiC Schottky diodes not only exhibit the advantages of wide bandgap technology compared to silicon PiN diodes, but they have significantly lower zero temperature coefficient (ZTC), meaning they are more electrothermally stable. The lower ZTC is due to the unipolar nature of SiC Schottky diodes as opposed to the bipolar nature of PiN diodes. This paper investigates the implementation and reliability of SiC Schottky diodes in press-pack assemblies. The impact of pressure loss on the electrothermal stability of parallel devices is investigated.