Nishad Udugampola

Ultra-fast LIGBTs and superjunction devices in membrane technology

Back-side etching of the entire silicon substrate under part of the drift region of a SOI power device was first proposed by Udrea and Amararunga (2004) and experimentally reported by Udrea et al. (2005). This technology concept enables high voltage devices to be embedded in a thin silicon/oxide membrane resulting in very significant improvements in breakdown ability and switching speed. This paper presents new results from advanced membrane high power devices and fully functional power ICs. Furthermore, record switching speeds for the LIGBT are reported. The feasibility of realising superjunction structures (3D Resurf) with breakdown capability in excess of 700V using this technology are also demonstrated

Thick silicon membrane technology for reliable and high performance operation of high voltage LIGBTs in Power ICs

A step change in performance and reliability of thick SOI membrane devices compared to earlier generation of devices on ultra-thin SOI membranes is reported in here. The membrane concept first reported offered a landmark improvement in the trade-off between switching losses and breakdown capability (in excess of 700V) but its current capability was limited by the thickness of the silicon membrane (around 30 A/cm2 for LIGBTs on 0.25 mum silicon membranes, achieving a loss related power density approaching 100 W/cm2 ). This paper reports on membrane power devices with current densities which approach the best of those offered by vertical devices (current density greater than 100 A/cm with power density of 180 W/cm2 ), without sacrificing switching speed (toff < 60 ns for 1.5 mum membranes). HTRB results showing 1000 h+ operation at 125degC at 80% of the rated voltage are also presented. Finally, it is shown that both the static and dynamic high temperature operation of thick membrane LIGBTs is superior to that of state-of-the-art integrated LDMOSFETs.

800V lateral IGBT in bulk Si for low power compact SMPS applications

An 800V rated lateral IGBT for high frequency, low-cost off-line applications has been developed. The LIGBT features a new method of adjusting the bipolar gain, based on a floating N+ stripe in front of the P+ anode/drain region. The floating N+ layer enhances the carrier recombination at the anode/drain side of the drift region resulting in a very significant decrease in the turn-off speed and substantially lower overall losses. Switching speeds as low as 140ns at 25oC and 300ns at 125oC have been achieved with corresponding equivalent Rdson at 125oC below 90mΩ.cm2. A fully operational AC-DC converter using a controller with an integrated LIGBT+depletion mode MOSFET chip has been designed and qualified in plastic SOP8 packages and used in 5W, 65kHz SMPS applications. The device is fabricated in 0.6μm bulk silicon CMOS technology without any additional masking steps.

Analysis and design of the dual-gate inversion layer emitter transistor

The dual-gate inversion layer emitter transistor (DGILET) is a device in which the injection of minority carriers takes place from an inversion layer formed under a MOS gate. Therefore, the device can be switched between MOS and bipolar modes using the gate giving the means to achieve a superior combination of low conduction losses and low switching losses. The structure of the device and operation in both the unipolar and bipolar modes are described in detail. Devices have been fabricated on bulk silicon wafers using junction isolation and experimental results confirm the expected superior performance. In particular, the results confirm predictions that if the inversion layer injector is properly designed, the voltage snapback that occurs during the transition between unipolar and bipolar modes can be completely suppressed. This can be achieved with a compact structure in contrast to the extended structures required in anode-shorted lateral insulated gate bipolar transistor (LIGBTs). An equivalent circuit for the DGILET is presented and the control of the minority carrier injection is also analyzed. Experimental results show that the DGILET can switch at speeds approaching those characteristic of MOSFETs with operating current densities comparable to LIGBTs. The results show that the DGILET offers lower overall losses than an LIGBT at switching frequencies above about 10 kHz.

Avalanche ruggedness of 800V Lateral IGBTs in bulk Si

Avalanche capability of 800V rated Lateral IGBTs (LIGBTs) fabricated using bulk CMOS technology has been investigated for the first time for both turn-on and turn-off. The LIGBTs have been designed for 65kHz operation in energy-efficient, compact off-line power supplies. Measurements of the device during turn-on revealed failures under high line voltages. The device was analysed using a combination of measurements and simulations which revealed that the dynamic avalanche was the cause of failure. An optimised LIGBT has been designed, simulated, fabricated and tested. The optimised device exhibits higher breakdown voltage and improved turn-on avalanche capability. Moreover, the optimised device showed improved avalanche capability during turn-off and reduced likelihood of latch-up.

The effect of the collector contact design on the performance and yield of 800V Lateral IGBTs for power ICs

We report here a new physical phenomenon related to contact etch depth in High Voltage Lateral IGBTs (LIGBTs) and propose a design technique to increase yield of LIGBTs in high volume production. We prove for the first time that the contact geometry and placement have direct effect on Collector injection efficiency in LIGBTs. An improved design for 800V LIGBTs obtained by optimising the layout of contact openings is proposed. The new structure resulted in 15% increase in production yield.

Flip-chip assembly and 3D stacking of 1000V lateral IGBT (LIGBT) dies

10 A, 1000 V-rated lateral insulated-gate bipolar transistor (LIGBT) has been specifically developed for Implantable Cardioverter Defibrillators (ICDs) and its design optimised for flip-chip assembly. By replacing currently used vertical IGBT with a lateral design which has all terminals on the same side of the die, flip-chip technique could be used for assembly of all components of the ICD. This simplified and lowered the cost of the assembly and enabled advanced embedding and 3D PCB stacking for further product miniaturisation. The ICD product based on lateral IGBTs resulted in 30% smaller footprint and 4 times reduced height compared to existing solutions built with vertical high-voltage devices. Stacking of multiple PCBs assembled with LIGBTs has also been successfully demonstrated, resulting in 70% smaller product footprint compared to solutions based on vertical IGBTs. Moreover, lateral IGBTs have significantly lower leakage currents than vertical devices (>10x), which reduces power consumption during normal operation. This extends the battery life of defibrillators and increases intervals between replacement surgeries, benefitting both the patient and healthcare provider.

Effect of Bandgap Narrowing on Performance of Modern Power Devices

The effect of the bandgap narrowing (BGN) on performance of power devices is investigated in detail in this paper. The analysis reveals that the change in the energy band structure caused by BGN can strongly affect the conductivity modulation of the bipolar devices resulting in a completely different performance. This is due to the modified injection efficiency under high-level injection conditions. Using a comprehensive analysis of the injection efficiency in a p-n junction, an analytical model for this phenomenon is developed. BGN model tuning has been proved to be essential in accurately predicting the performance of a lateral insulated-gate bipolar transistor (IGBT). Other devices such as p-i-n diodes or punch-through IGBTs are significantly affected by the BGN, while others, such as field-stop IGBTs or power MOSFETs, are only marginally affected.

Inversion layer injection devices from concept to applications in HVICs

This paper reviews the concept of inversion layer injection from the band diagrams to full fabrication and application in the area of high voltage integrated circuits. Inversion layer injection devices range from vertical trench gate structures where the inversion layer is used as a thyristor emitter, to lateral devices in power integrated circuits where the inversion layer is used as a p-type injector in the anode junction of LIGBT-like structures. When applied to lateral devices the concept delivers smooth I-V characteristic without trading off the on-state against transient losses and thus achieving very high frequency capability (in excess of 100 KHz for 500 V devices). Therefore such devices are particularly attractive for emerging high voltage integrated circuits where achieving a high current density with minimum overall losses is essential.

Impact of underfill and other physical dimensions on Silicon Lateral IGBT package reliability using computer model with discrete and continuous design variables

An effort to design and build a prototype LED driver system which is energy efficient, highly compact and with few component count was initiated by a consortium UK universities. The prototype system will be based on Silicon Lateral IGBT (LIGBT) device combined with chip on board technology. Part ofthis effort, finite element modelling and analysis were undertaken in order to mitigate the underfill dielectric breakdown failure and solder interconnect fatigue failure of the LIGBT package structure. Electro-static analysis was undertaken to predict the extreme electric field distribution in the underfill. Based on electro-static analysis, five commercial underfill were selected for thermo-mechanical finite element analysis on solder joint fatigue failure prediction under cyclic loading. A design optimisation analysis was endeavoured to maximise the solder interconnect reliability by utilising a computer model with continuous variable (physical dimensions) and discrete variables (underfill type) and a stochastic optimiser such as multi-objective mixed discrete particle swarm optimisation. From the optimisation analysis best trade off solution are obtained.