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Dive into the research topics where Pyo Jin Jeon is active.

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Featured researches published by Pyo Jin Jeon.


Nano Letters | 2016

Black Phosphorus–Zinc Oxide Nanomaterial Heterojunction for p–n Diode and Junction Field-Effect Transistor

Pyo Jin Jeon; Young Tack Lee; June Yeong Lim; Jin Sung Kim; Do Kyung Hwang; Seongil Im

Black phosphorus (BP) nanosheet is two-dimensional (2D) semiconductor with distinct band gap and attracting recent attention from researches because it has some similarity to gapless 2D semiconductor graphene in the following two aspects: single element (P) for its composition and quite high mobilities depending on its fabrication conditions. Apart from several electronic applications reported with BP nanosheet, here we report for the first time BP nanosheet-ZnO nanowire 2D-1D heterojunction applications for p-n diodes and BP-gated junction field effect transistors (JFETs) with n-ZnO channel on glass. For these nanodevices, we take advantages of the mechanical flexibility of p-type conducting of BP and van der Waals junction interface between BP and ZnO. As a result, our BP-ZnO nanodimension p-n diode displays a high ON/OFF ratio of ∼10(4) in static rectification and shows kilohertz dynamic rectification as well while ZnO nanowire channel JFET operations are nicely demonstrated by BP gate switching in both electrostatics and kilohertz dynamics.


Nano Letters | 2015

Dual Gate Black Phosphorus Field Effect Transistors on Glass for NOR Logic and Organic Light Emitting Diode Switching

Jin Sung Kim; Pyo Jin Jeon; J. Lee; Kyunghee Choi; Hee Sung Lee; Youngsuk Cho; Young Tack Lee; Do Kyung Hwang; Seongil Im

We have fabricated dual gate field effect transistors (FETs) with 12 nm-thin black phosphorus (BP) channel on glass substrate, where our BP FETs have a patterned-gate architecture with 30 nm-thick Al2O3 dielectrics on top and bottom of a BP channel. Top gate dielectric has simultaneously been used as device encapsulation layer, controlling the threshold voltage of FETs as well when FETs mainly operate under bottom gate bias. Bottom, top, and dual gate-controlling mobilities were estimated to be 277, 92, and 213 cm(2)/V s, respectively. Maximum ON-current was measured to be ∼5 μA at a drain voltage of -0.1 V but to be as high as ∼50 μA at -1 V, while ON/OFF current ratio appeared to be 3.6 × 10(3) V. As a result, our dual gate BP FETs demonstrate organic light emitting diode (OLED) switching for green and blue OLEDs, also demonstrating NOR logic functions by separately using top- and bottom-input.


ACS Applied Materials & Interfaces | 2015

Low Power Consumption Complementary Inverters with n-MoS2 and p-WSe2 Dichalcogenide Nanosheets on Glass for Logic and Light-Emitting Diode Circuits

Pyo Jin Jeon; Jin Sung Kim; June Yeong Lim; Youngsuk Cho; Atiye Pezeshki; Hee Sung Lee; Sanghyuck Yu; Sung Wook Min; Seongil Im

Two-dimensional (2D) semiconductor materials with discrete bandgap become important because of their interesting physical properties and potentials toward future nanoscale electronics. Many 2D-based field effect transistors (FETs) have thus been reported. Several attempts to fabricate 2D complementary (CMOS) logic inverters have been made too. However, those CMOS devices seldom showed the most important advantage of typical CMOS: low power consumption. Here, we adopted p-WSe2 and n-MoS2 nanosheets separately for the channels of bottom-gate-patterned FETs, to fabricate 2D dichalcogenide-based hetero-CMOS inverters on the same glass substrate. Our hetero-CMOS inverters with electrically isolated FETs demonstrate novel and superior device performances of a maximum voltage gain as ∼27, sub-nanowatt power consumption, almost ideal noise margin approaching 0.5VDD (supply voltage, VDD=5 V) with a transition voltage of 2.3 V, and ∼800 μs for switching delay. Moreover, our glass-substrate CMOS device nicely performed digital logic (NOT, OR, and AND) and push-pull circuits for organic light-emitting diode switching, directly displaying the prospective of practical applications.


Advanced Materials | 2012

Ferroelectric Nonvolatile Nanowire Memory Circuit Using a Single ZnO Nanowire and Copolymer Top Layer

Young Tack Lee; Pyo Jin Jeon; Kwang Hoon Lee; Ryong Ha; Heon-Jin Choi; Seongil Im

IO N Nanowire-based fi eld-effect transistors (FETs) and diodes have been continuously studied along with a great variety of semiconductor nanowires (NWs), including Si, Ge, SiGe, GaN, InP, and ZnO. [ 1–8 ] Among all the NW materials, ZnO appears to have relatively good metal electrode–semiconductor contact, which improves the device fabrication yield. [ 7–17 ] Therefore, using a long ZnO NW it may be possible to realize one-dimensional (1D) NW electronics, which may contain a FET, [ 7 , 10–14 ]


Journal of Materials Chemistry C | 2015

Enhanced device performances of WSe2–MoS2 van der Waals junction p–n diode by fluoropolymer encapsulation

Pyo Jin Jeon; Sung Wook Min; Jin Sung Kim; Syed Raza Ali Raza; Kyunghee Choi; Hee Sung Lee; Young Tack Lee; Do Kyung Hwang; Hyoung Joon Choi; Seongil Im

Two-dimensional heterojunction diodes with WSe2 and MoS2 nanoflakes respectively as p- and n-type semiconductors were fabricated on both glass and SiO2/p+-Si by direct imprinting. Superior electrostatic and dynamic performances were acquired from the diode on glass when an electric dipole-containing fluoropolymer was employed for encapsulation: forward and reverse current toward ideal behavior, enhanced aging/ambient stability, and improved dynamic rectification resulted.


ACS Nano | 2016

Static and Dynamic Performance of Complementary Inverters Based on Nanosheet α-MoTe2 p-Channel and MoS2 n-Channel Transistors

Atiye Pezeshki; Seyed Hossein Hosseini Shokouh; Pyo Jin Jeon; Iman Shackery; Jin Sung Kim; Il Kwon Oh; Seong Chan Jun; Hyungjun Kim; Seongil Im

Molybdenum ditelluride (α-MoTe2) is an emerging transition-metal dichalcogenide (TMD) semiconductor that has been attracting attention due to its favorable optical and electronic properties. Field-effect transistors (FETs) based on few-layer α-MoTe2 nanosheets have previously shown ambipolar behavior with strong p-type and weak n-type conduction. We have employed a direct imprinting technique following mechanical nanosheet exfoliation to fabricate high-performance complementary inverters using α-MoTe2 as the semiconductor for the p-channel FETs and MoS2 as the semiconductor for the n-channel FETs. To avoid ambipolar behavior and produce α-MoTe2 FETs with clean p-channel characteristics, we have employed the high-workfunction metal platinum for the source and drain contacts. As a result, our α-MoTe2 nanosheet p-channel FETs show hole mobilities up to 20 cm(2)/(V s), on/off ratios up to 10(5), and a subthreshold slope of 255 mV/decade. For our complementary inverters composed of few-layer α-MoTe2 p-channel FETs and MoS2 n-channel FETs we have obtained voltage gains as high as 33, noise margins as high as 0.38 VDD, a switching delay of 25 μs, and a static power consumption of a few nanowatts.


ACS Applied Materials & Interfaces | 2014

DNA-Base Guanine as Hydrogen Getter and Charge-Trapping Layer Embedded in Oxide Dielectrics for Inorganic and Organic Field-Effect Transistors

J. Lee; Ji Hoon Park; Young Tack Lee; Pyo Jin Jeon; Hee Sung Lee; Seung Hee Nam; Yeonjin Yi; Younjoo Lee; Seongil Im

DNA-base small molecules of guanine, cytosine, adenine, and thymine construct the DNA double helix structure with hydrogen bonding, and they possess such a variety of intrinsic benefits as natural plentitude, biodegradability, biofunctionality, low cost, and low toxicity. On the basis of these advantages, here, we report on unprecedented useful applications of guanine layer as hydrogen getter and charge trapping layer when it is embedded into a dielectric oxide of n-channel inorganic InGaZnO and p-channel organic heptazole field effect transistors (FETs). The embedded guanine layer much improved the gate stability of inorganic FETs gettering many hydrogen atoms in the gate dielectric layer of FET, and it also played as charge trapping layer to which the voltage pulse-driven charges might be injected from channel, resulting in a threshold voltage (Vth) shift of FETs. Such shift state is very ambient-stable and almost irrevocable even under a high electric-field at room temperature. So, Boolean logics are nicely demonstrated by using our FETs with the guanine-embedded dielectric. The original Vth is recovered only under high energy blue photons by opposite voltage pulse (charge-ejection), which indicates that our device is also applicable to nonvolatile photo memory.


Advanced Materials | 2015

High-gain subnanowatt power consumption hybrid complementary logic inverter with WSe2 nanosheet and ZnO nanowire transistors on glass.

Seyed Hossein Hosseini Shokouh; Atiye Pezeshki; Syed Raza Ali Raza; Hee Sung Lee; Sung Wook Min; Pyo Jin Jeon; Jae Min Shin; Seongil Im

A 1D-2D hybrid complementary logic inverter comprising of ZnO nanowire and WSe2 nanosheet field-effect transistors (FETs) is fabricated on glass, which shows excellent static and dynamic electrical performances with a voltage gain of ≈60, sub-nanowatt power consumption, and at least 1 kHz inverting speed.


Nanoscale | 2013

Long single ZnO nanowire for logic and memory circuits: NOT, NAND, NOR gate, and SRAM

Young Tack Lee; Syed Raza Ali Raza; Pyo Jin Jeon; Ryong Ha; Heon-Jin Choi; Seongil Im

We demonstrate logic and static random access memory (SRAM) circuits using a 100 μm long and 100 nm thin single ZnO nanowire (NW), which acts as a channel of field-effect transistors (FETs) with Al2O3 dielectrics. NW FETs are thus arrayed in one dimension to consist of NOT, NAND, and NOR gate logic, and SRAM circuits. Two respective top-gate NW FETs with Au and indium-tin-oxide (ITO) were connected to form an inverter, the basic NOT gate component, since the former gate leads to an enhanced mode FET while the latter to depletion mode due to their work function difference. Our inverters showed a high voltage gain of 22 under a 5 V operational voltage, resulting in successful operation of all other devices. We thus conclude that our long single NW approach is quite promising to extend the field of nano-electronics.


Scientific Reports | 2016

Self-Limiting Layer Synthesis of Transition Metal Dichalcogenides.

Youngjun Kim; Jeong Gyu Song; Yong Ju Park; Gyeong Hee Ryu; Su Jeong Lee; Jin Sung Kim; Pyo Jin Jeon; Chang Wan Lee; Whang Je Woo; Taejin Choi; Hanearl Jung; Han Bo Ram Lee; Jae Min Myoung; Seongil Im; Zonghoon Lee; Jong Hyun Ahn; J. Park; Hyungjun Kim

This work reports the self-limiting synthesis of an atomically thin, two dimensional transition metal dichalcogenides (2D TMDCs) in the form of MoS2. The layer controllability and large area uniformity essential for electronic and optical device applications is achieved through atomic layer deposition in what is named self-limiting layer synthesis (SLS); a process in which the number of layers is determined by temperature rather than process cycles due to the chemically inactive nature of 2D MoS2. Through spectroscopic and microscopic investigation it is demonstrated that SLS is capable of producing MoS2 with a wafer-scale (~10 cm) layer-number uniformity of more than 90%, which when used as the active layer in a top-gated field-effect transistor, produces an on/off ratio as high as 108. This process is also shown to be applicable to WSe2, with a PN diode fabricated from a MoS2/WSe2 heterostructure exhibiting gate-tunable rectifying characteristics.

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Young Tack Lee

Korea Institute of Science and Technology

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Do Kyung Hwang

Korea Institute of Science and Technology

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