Syed Ali Raza

Enhanced device performances of WSe2–MoS2 van der Waals junction p–n diode by fluoropolymer encapsulation

Two-dimensional heterojunction diodes with WSe2 and MoS2 nanoflakes respectively as p- and n-type semiconductors were fabricated on both glass and SiO2/p+-Si by direct imprinting. Superior electrostatic and dynamic performances were acquired from the diode on glass when an electric dipole-containing fluoropolymer was employed for encapsulation: forward and reverse current toward ideal behavior, enhanced aging/ambient stability, and improved dynamic rectification resulted.

High-gain subnanowatt power consumption hybrid complementary logic inverter with WSe2 nanosheet and ZnO nanowire transistors on glass.

A 1D-2D hybrid complementary logic inverter comprising of ZnO nanowire and WSe2 nanosheet field-effect transistors (FETs) is fabricated on glass, which shows excellent static and dynamic electrical performances with a voltage gain of ≈60, sub-nanowatt power consumption, and at least 1 kHz inverting speed.

Long single ZnO nanowire for logic and memory circuits: NOT, NAND, NOR gate, and SRAM

We demonstrate logic and static random access memory (SRAM) circuits using a 100 μm long and 100 nm thin single ZnO nanowire (NW), which acts as a channel of field-effect transistors (FETs) with Al2O3 dielectrics. NW FETs are thus arrayed in one dimension to consist of NOT, NAND, and NOR gate logic, and SRAM circuits. Two respective top-gate NW FETs with Au and indium-tin-oxide (ITO) were connected to form an inverter, the basic NOT gate component, since the former gate leads to an enhanced mode FET while the latter to depletion mode due to their work function difference. Our inverters showed a high voltage gain of 22 under a 5 V operational voltage, resulting in successful operation of all other devices. We thus conclude that our long single NW approach is quite promising to extend the field of nano-electronics.

Top and back gate molybdenum disulfide transistors coupled for logic and photo-inverter operation

We demonstrate an inverter type nanodevice based on 2-dimensional semiconducting molybdenum disulfide (MoS2) nanoflakes. The inverter device was comprised of back-gate and top-gate field-effect transistors (FETs) which work respectively as a load and a driver for a logic inverter in the dark but switch their roles for photo-inverter operation. Our logic inverter shows a relatively high voltage gain of more than 12. When the back-gate FET controls the circuit as a driver to sensitively detect visible light using its open channel, the device effectively operates as a photo-inverter detecting visible photons. Our inverter based on top- and back-gate MoS2 FETs would be quite promising for both logic and photo-sensing applications due to its performance and simple device configuration as well.

Transition metal dichalcogenide heterojunction PN diode toward ultimate photovoltaic benefits

Recently, two-dimensional (2D) transition metal dichalcogenide (TMDC) semiconductors as van der Waals (vdW) materials have attracted much attention from researchers. Among many 2D TMDC materials, a few layer-thin molybdenum disulfide (MoS2) and tungsten diselenide (WSe2) have been most intensively studied respectively as 2D n- and p-type semiconductors. Here, we have fabricated vertical vdW heterojunction n-MoS2/p-WSe2 diode with a few tens nm-thick layers by using vertically-sandwiched ohmic terminals, so that no quasi neutral region may exist between two terminals. As a result, we obtained high photo responsivity at zero volt without any electric power, and it appears comparable to those of commercially-optimized Si PN diode. Photo-voltage output of 0.3 V was easily obtained from our vdW PN diode as open circuit voltage, and can be doubled up to 0.6 V by using two PN diodes. These beneficial photovoltaic results from vdW PN diode were directly applied to PV switching dynamics and transistor photo gating, for the first time. We regard that our vdW n-MoS2/p-WSe2 heterojunction diode could maximize its photovoltaic energy benefits with optimized TMDC thicknesses.

Molybdenum Disulfide Nanoflake–Zinc Oxide Nanowire Hybrid Photoinverter

We demonstrate a hybrid inverter-type nanodevice composed of a MoS2 nanoflake field-effect transistor (FET) and ZnO nanowire Schottky diode on one substrate, aiming at a one-dimensional (1D)-two-dimensional (2D) hybrid integrated electronic circuit with multifunctional capacities of low power consumption, high gain, and photodetection. In the present work, we used a nanotransfer printing method using polydimethylsiloxane for the fabrication of patterned bottom-gate MoS2 nanoflake FETs, so that they could be placed near the ZnO nanowire Schottky diodes that were initially fabricated. The ZnO nanowire Schottky diode and MoS2 FET worked respectively as load and driver for a logic inverter, which exhibits a high voltage gain of ∼50 at a supply voltage of 5 V and also shows a low power consumption of less than 50 nW. Moreover, our inverter effectively operates as a photoinverter, detecting visible photons, since MoS2 FETs appear very photosensitive, while the serially connected ZnO nanowire Schottky diode was blind to visible light. Our 1D-2D hybrid nanoinverter would be quite promising for both logic and photosensing applications due to its performance and simple device configuration as well.

A ZnO nanowire-based photo-inverter with pulse-induced fast recovery

We demonstrate a fast response photo-inverter comprised of one transparent gated ZnO nanowire field-effect transistor (FET) and one opaque FET respectively as the driver and load. Under ultraviolet (UV) light the transfer curve of the transparent gate FET shifts to the negative side and so does the voltage transfer curve (VTC) of the inverter. After termination of UV exposure the recovery of photo-induced current takes a long time in general. This persistent photoconductivity (PPC) is due to hole trapping on the surface of ZnO NWs. Here, we used a positive voltage short pulse after UV exposure, for the first time resolving the PPC issue in nanowire-based photo-detectors by accumulating electrons at the ZnO/dielectric interface. We found that a pulse duration as small as 200 ns was sufficient to reach a full recovery to the dark state from the UV induced state, realizing a fast UV detector with a voltage output.

Photoelectric probing of the interfacial trap density-of-states in ZnO nanowire field-effect transistors

We have fabricated transparent top-gate ZnO nanowire (NW) field effect transistors (FETs) on glass and measured their trap density-of-states (DOS) at the dielectric/ZnO NW interface with monochromatic photon beams during their operation. Our photon-probe method showed clear signatures of charge trap DOS at the interface, located near 2.3, 2.7, and 2.9 eV below the conduction band edge. The DOS information was utilized for the photo-detecting application of our transparent NW-FETs, which demonstrated fast and sensitive photo-detection of visible lights.

NiOx Schottky-gated ZnO nanowire metal–semiconductor field effect transistor: fast logic inverter and photo-detector

We demonstrate a high performance ZnO nanowire (NW) metal–semiconductor field effect transistor (MESFET) using semi-transparent NiOx as a Schottky gate (SG), which shows excellent carrier mobility, on/off ratio, and sub-threshold slope of 301 cm2 V−1 s−1, 106, and 60 mV per decade, respectively. Based on the MESFET device cells, we fabricated one-dimensional (1D) logic NOT, NAND, and NOR gate circuits. The NOT gate inverter showed a high voltage gain of ∼16 under a supply voltage of 5 V and also displayed an excellent voltage inverting dynamics of at least a few kHz. In addition, attributed to the intrinsic sub-band gap defects at the transparent SG NiOx/ZnO interface, our MESFET displayed good responses to visible light with a photo-gain of 7 × 104. The persistent photoconductivity issue which originates from oxide semiconductor interfaces in general was initially present but was resolved by increasing the gate–source voltage of MESFET toward reverse bias.

NOT and NOR Logic Circuits Using Passivation Dielectric Involved Dual Gate in a-InGaZnO TFTs

Dual-gate amorphous (a)-InGaZnO thin-film transistors (TFTs) are simply realized using the passivation layer of already fabricated bottom-gate TFTs as top-gate dielectric, so that an electrical biasing of either top or bottom gate may control the threshold behavior of the device. By applying a voltage to the top gate of a TFT that is serially connected to the next adjacent TFT, we could form a logic inverter with a decent voltage gain and desirable transition voltage, while a NOR logic circuit was also achieved by independent control of the dual gates. On the one hand, when both of the top and bottom gates are simultaneously controlled by single bias, our dual-gate TFT displays an excellent subthreshold swing property that leads to an excellent voltage gain in an inverter.