Q.-Y. Tong

Low temperature wafer direct bonding

A pronounced increase of interface energy of room temperature bonded hydrophilic Si/Si, Si/SiO/sub 2/, and SiO/sub 2//SiO/sub 2/ wafers after storage in air at room temperature, 150/spl deg/C for 10-400 h has been observed. The increased number of OH groups due to a reaction between water and the strained oxide and/or silicon at the interface at temperatures below 110/spl deg/C and the formation of stronger siloxane bonds above 110/spl deg/C appear to be the main mechanisms responsible for the increase in the interface energy. After prolonged storage, interface bubbles are detectable by an infrared camera at the Si/Si bonding seam. Desorbed hydrocarbons as well as hydrogen generated by a reaction of water with silicon appear to be the major contents in the bubbles. Design guidelines for low temperature wafer direct bonding technology are proposed. >

Hydrophobic silicon wafer bonding

Wafers prepared by an HF dip without a subsequent water rinse were bonded at room temperature and annealed at temperatures up to 1100 °C. Based on substantial differences between bonded hydrophilic and hydrophobic Si wafer pairs in the changes of the interface energy with respect to temperature, secondary ion mass spectrometry (SIMS) and transmission electron microscopy (TEM), we suggest that hydrogen bonding between Si‐F and H‐Si across two mating wafers is responsible for room temperature bonding of hydrophobic Si wafers. The interface energy of the bonded hydrophobic Si wafer pairs does not change appreciably with time up to 150 °C. This stability of the bonding interface makes reversible room‐temperature hydrophobic wafer bonding attractive for the protection of silicon wafer surfaces.

Semiconductor wafer bonding: recent developments

Abstract Recent advances in semiconductor wafer direct bonding science and technology are reviewed in terms of room-temperature contacting, interface energy, interface bubbles, interface charges, thinning one wafer of a bonded pair and properties of bonded structures. Although silicon wafer bonding (with or without surface oxide) and silicon-on-insulator preparation are the main topics, bonding of dissimilar materials is also discussed. Examples of wafer bonding applications for material and device integration are given.

Wafer bonding and layer splitting for microsystems

In advanced microsystems various types of devices (metal-oxide semiconductor field-effect transistors, bipolar transistors, sensors, actuators, microelectromechanical systems, lasers) may be on the same chip, some of which are 3D structures in nature. Therefore, not only materials combinations (integrated materials) are required for optimal device performance of each type but also process technologies for 3D device fabrication are essential. Wafer bonding and layer transfer are two of the fundamental technologies for the fabrication of advanced microsystems. In this review, the generic nature of both wafer bonding and hydrogen-implantation-induced layer splitting are discussed. The basic processes underlying wafer bonding and the layer splitting process are presented. Examples of bonding and layer splitting of bare or processed semiconductor and oxide wafers are described.

A Model of Low‐Temperature Wafer Bonding And Its Applications

Si-OH groups can polymerize to form strong covalent Si-O-Si bonds at low temperatures. Based on this behavior a model for hydrophilic Si wafer bonding is suggested which allows significant increase of bonding strength by low-temperature annealing. A possible extension of this model to materials other than Si is discussed. Methods to prevent generation of interface bubbles during the low-temperature annealing are presented. The low-temperature bonding approach has been employed in layer transfer applications such as an ultrathin silicon-on-insulator layers by an implanted carbon etch stop, single-crystal Si layer on quartz, glass, or sapphire. Analysis of thermal peeling stresses in bonded pairs of dissimilar materials led to the development of bonding and heating-cooling schedules as well as a low vacuum bonding method to avoid peeling during annealing and subsequent thinning (etching).

Wafer bonding for microsystems technologies

In microsystems technologies, frequently complex structures consisting of structured or plain silicon or other wafers have to be joined to one mechanically stable configuration. In many cases, wafer bonding, also termed fusion bonding, allows to achieve this objective. The present overview will introduce the different requirements surfaces have to fulfill for successful bonding especially in the case of silicon wafers. Special emphasis is put on understanding the atomistic reactions at the bonding interface. This understanding has allowed the development of a simple low temperature bonding approach which allows to reach high bonding energies at temperatures as low as 150°C. Implications for pressure sensors will be discussed as well as various thinning approaches and bonding of dissimilar materials.

FUNDAMENTAL ISSUES IN WAFER BONDING

Semiconductor wafer bonding has increasingly become a technology of choice for materials integration in microelectronics, optoelectronics, and microelectromechanical systems. The present overview concentrates on some basic issues associated with wafer bonding such as the reactions at the bonding interface during hydrophobic and hydrophilic wafer bonding, as well as during ultrahigh vacuum bonding. Mechanisms of hydrogen-implantation induced layer splitting (“smart-cut” and “smarter-cut” approaches) are also considered. Finally, recent developments in the area of so-called “compliant universal substrates” based on twist wafer bonding are discussed.

Low Vacuum Wafer Bonding

Compared to bonding wafers in air, bonding of hydrophilic silicon wafers performed in low vacuum leads to much stronger bonds at the bonding interface after annealing at temperatures as low as . The bond energy reached is close to that of thermal silicon oxide itself. For hydrophilic wafer pairs bonded in air, a high bond energy at the bonding interface can also be realized by a low vacuum storage prior to the annealing, or a low vacuum annealing at after bonding. These low vacuum effects appear to be associated with a significant reduction of trapped nitrogen at the bonding interface. Trapped nitrogen prevents an intimate contact of the bonding surfaces during annealing and thus prevents formation of covalent bonds. Because a difference in thermal expansion coefficients is usually present between different wafers, in order to avoid excess thermal stresses the low vacuum bonding approach is crucial for bonding of dissimilar materials in applications such as microelectromechanical systems and has been applied to bonding silicon to materials other than silicon which have hydrophilic surfaces. ©1998 The Electrochemical Society

The Role of Surface Chemistry in Bonding of Standard Silicon Wafers

Hydrophilic silicon surfaces become hydrophobic without microroughening after 200°C low energy hydrogen plasma cleaning. The fully hydrogen-terminated silicon surfaces do not bond to each other, not even by the application of external pressure. A subsequent 400 to 600°C, 4 min thermal treatment in ultrahigh vacuum converts the wafer surfaces to hydrophilic and bondable which can be attributed to desorption of hydrogen from the surfaces. Hydrophobic silicon surfaces prepared by a dip in HF (without subsequent water rinse) are terminated by H and a small amount of F, or by H and a small amount of OH (after subsequent water rinse). Hydrogen bonding of Si-F...(HF)...H-Si or Si-OH...(HOH)...OH-Si across the two mating surfaces appears to be responsible for room temperature spontaneous hydrophobic or hydrophilic wafer bonding, respectively.

Silicon carbide wafer bonding

β-SiC layers produced on Si substrates by rapid thermal chemical vapor deposition have been transferred onto oxidized Si substrates by bonding and etchback. For SiC films with a mean surface roughness of about 20 A, room temperature bonding to smooth oxidized Si wafers is possible under the influence of an external force. For 4 in. diam substrates, bonding of ∼85% of the area was obtained. Sections of the SiC/Si layer of the bonded pair peeled off when the Si substrate of the SiC layer is thinned down to ∼150 μm and below. This is probably caused by the low interface fracture energy due to trapped air at the bonding interface and by outgassing from the thermal oxide of SiC in addition to the film stress. Multistep annealing at 1100 o C between KOH etches of the Si substrate can enhance the interface fracture energy of the bonded pairs. A densification step of the SiC thermal oxide after dry oxidation helps to reduce the trapped gas in the oxide. Auger and transmission electron microscope, results have verified that the transferred SiC layer retains its original properties