Qiangfei Xia

Memristor-CMOS hybrid integrated circuits for reconfigurable logic

Hybrid reconfigurable logic circuits were fabricated by integrating memristor-based crossbars onto a foundry-built CMOS (complementary metal-oxide-semiconductor) platform using nanoimprint lithography, as well as materials and processes that were compatible with the CMOS. Titanium dioxide thin-film memristors served as the configuration bits and switches in a data routing network and were connected to gate-level CMOS components that acted as logic elements, in a manner similar to a field programmable gate array. We analyzed the chips using a purpose-built testing system, and demonstrated the ability to configure individual devices, use them to wire up various logic gates and a flip-flop, and then reconfigure devices.

Black Phosphorus Radio-Frequency Transistors

Few-layer and thin film forms of layered black phosphorus (BP) have recently emerged as a promising material for applications in high performance nanoelectronics and infrared optoelectronics. Layered BP thin films offer a moderate bandgap of around 0.3 eV and high carrier mobility, which lead to transistors with decent on-off ratios and high on-state current densities. Here, we demonstrate the gigahertz frequency operation of BP field-effect transistors for the first time. The BP transistors demonstrated here show respectable current saturation with an on-off ratio that exceeds 2 × 10(3). We achieved a current density in excess of 270 mA/mm and DC transconductance above 180 mS/mm for hole conduction. Using standard high frequency characterization techniques, we measured a short-circuit current-gain cutoff frequency fT of 12 GHz and a maximum oscillation frequency fmax of 20 GHz in 300 nm channel length devices. BP devices may offer advantages over graphene transistors for high frequency electronics in terms of voltage and power gain due to the good current saturation properties arising from their finite bandgap, thus can be considered as a promising candidate for the future high performance thin film electronics technology for operation in the multi-GHz frequency range and beyond.

Black Phosphorus Mid-Infrared Photodetectors with High Gain

Recently, black phosphorus (BP) has joined the two-dimensional material family as a promising candidate for photonic applications due to its moderate bandgap, high carrier mobility, and compatibility with a diverse range of substrates. Photodetectors are probably the most explored BP photonic devices, however, their unique potential compared with other layered materials in the mid-infrared wavelength range has not been revealed. Here, we demonstrate BP mid-infrared detectors at 3.39 μm with high internal gain, resulting in an external responsivity of 82 A/W. Noise measurements show that such BP photodetectors are capable of sensing mid-infrared light in the picowatt range. Moreover, the high photoresponse remains effective at kilohertz modulation frequencies, because of the fast carrier dynamics arising from BPs moderate bandgap. The high photoresponse at mid-infrared wavelengths and the large dynamic bandwidth, together with its unique polarization dependent response induced by low crystalline symmetry, can be coalesced to promise photonic applications such as chip-scale mid-infrared sensing and imaging at low light levels.

Hybrid Nanoimprint−Soft Lithography with Sub-15 nm Resolution

We developed a hybrid nanoimprint-soft lithography technique with sub-15 nm resolution. It is capable of patterning both flat and curved substrates. The key component of the technology is the mold, which consists of rigid features on an elastic poly(dimethylsiloxane) (PDMS) support. The mold was fabricated by imprinting a reverse image onto the PDMS substrate using a UV-curable low-viscosity prepolymer film. Patterns with sub-15-nm resolution were faithfully duplicated on a flat substrate without applying external pressure. Gratings at 200 nm pitch were also successfully imprinted onto the cylindrical surface of a single mode optical fiber with a 125 microm diameter.

Diffusion of Adhesion Layer Metals Controls Nanoscale Memristive Switching

First prominent more than 40 years ago, [ 1 ] electrical resistance switching in conductor/insulator/conductor structures has regained signifi cant attention in the last decade, [ 2–16 ] motivated by the search for alternatives to conventional semiconductor electronics. [ 17 ] Recent results have shown promising device behaviors, such as reversible, non-volatile, fast ( < 10 ns), lowpower ( ∼ 1 pJ/operation) and multiple-state switching, [ 18–26 ]

Sub-10 nm self-enclosed self-limited nanofluidic channel arrays.

We report a new method to fabricate self-enclosed optically transparent nanofluidic channel arrays with sub-10 nm channel width over large areas. Our method involves patterning nanoscale Si trenches using nanoimprint lithography (NIL), sealing the trenches into enclosed channels by ultrafast laser pulse melting and shrinking the channel sizes by self-limiting thermal oxidation. We demonstrate that 100 nm wide Si trenches can be sealed and shrunk to 9 nm wide and that lambda-phage DNA molecules can be effectively stretched by the channels.

Self-Aligned Memristor Cross-Point Arrays Fabricated with One Nanoimprint Lithography Step

We demonstrate a technique to fabricate memristor cross-point arrays using a self-aligned, one step nanoimprint lithography process that simultaneously patterns the bottom electrode, switching material film and the top electrode. Since this process does not require overlay alignment, the fabrication complexity is greatly reduced and the throughput is significantly increased. The critical interfaces are exposed to much less contamination and thus under better chemical control. With this technique, we fabricated arrays of TiO(2)-based memristive devices (junction area 100 nm by 100 nm) that did not require electrical forming and were operated with nanoampere currents.

A memristor-based nonvolatile latch circuit

Memristive devices, which exhibit a dynamical conductance state that depends on the excitation history, can be used as nonvolatile memory elements by storing information as different conductance states. We describe the implementation of a nonvolatile synchronous flip-flop circuit that uses a nanoscale memristive device as the nonvolatile memory element. Controlled testing of the circuit demonstrated successful state storage and restoration, with an error rate of 0.1%, during 1000 power loss events. These results indicate that integration of digital logic devices and memristors could open the way for nonvolatile computation with applications in small platforms that rely on intermittent power sources. This demonstrated feasibility of tight integration of memristors with CMOS (complementary metal-oxide-semiconductor) circuitry challenges the traditional memory hierarchy, in which nonvolatile memory is only available as a large, slow, monolithic block at the bottom of the hierarchy. In contrast, the nonvolatile, memristor-based memory cell can be fast, fine-grained and small, and is compatible with conventional CMOS electronics. This threatens to upset the traditional memory hierarchy, and may open up new architectural possibilities beyond it.

Ultrafast patterning of nanostructures in polymers using laser assisted nanoimprint lithography

We propose and demonstrate a nanopatterning technique, laser-assisted nanoimprint lithography (LAN), in which the polymer is melted by a single excimer laser pulse and then imprinted by a mold made of fused quartz. LAN has been used to pattern nanostructures in various polymer films on a Si or quartz substrate with high fidelity over the entire mold area. Here we show 200 nm pitch gratings with 100 nm linewidth and 90 nm height. The entire imprint from melting the polymer to completion of the imprint is less than 500 ns. The mold has been used multiple times without cleaning between each imprint. LAN not only greatly shortens the imprint processing time, but also significantly reduces the heating and expansion of the substrate and mold, leading to better overlay alignment between the two.

Strong Impact of Acute Kidney Injury on Survival After Liver Transplantation

Acute kidney injury (AKI) is a major complication in orthotopic liver transplantation (OLT). In an evaluation of Acute Kidney Injury Network (AKIN) criteria in liver transplanted patients, we retrospectively analyzed the usefulness of these criteria to predict survival of 193 consecutive patients at a single center who underwent primary OLT for clinical parameters and peak AKI. Postoperative AKI according to AKIN occurred in 60.1% of the patients, namely, stages 1, 2, and 3 in 30%, 13% and 17.1% respectively. Using multivariate logistic regression, AKIN stage 1 and 2 AKI were independently associated with the pre-OLT Model for End-Stage Liver Disease (MELD) score and age, while stage 3 AKI was independently associated with MELD and Acute Physiology and Chronic Health Evaluation (APACHE) II scores. The 28-day and 1-year mortality post-OLT of AKI patients were 15.5% and 25.9% respectively compared with 0% and 3.9% among non-AKI patients (P < .05 for both). The survival rates of non-AKI and stages 1, 2, and 3 AKI subjects were 96%, 85.5%, 84%, and 45.3%, respectively. Cox regression analysis showed independent risk factors for mortality during the first year after transplantation to include post-OLT AKI (12.1; P < .05), post-OLT infection (HR 4.7; P < .01), pre-OLT hypertension (HR 4.4; P < .01) hazard ratio [HR] and post-OLT APACHE II ≥10 (HR 3.6; P < .05). We concluded that AKI as defined by the AKIN criteria is a major complication of OLT linked to a poor outcomes. It remains to be evaluated whether aggressive perioperative therapy to prevent AKI can improve survival among OLT patients.