Qifeng Lu

Hysteresis in Lanthanide Aluminum Oxides Observed by Fast Pulse CV Measurement

Oxide materials with large dielectric constants (so-called high-k dielectrics) have attracted much attention due to their potential use as gate dielectrics in Metal Oxide Semiconductor Field Effect Transistors (MOSFETs). A novel characterization (pulse capacitance-voltage) method was proposed in detail. The pulse capacitance-voltage technique was employed to characterize oxide traps of high-k dielectrics based on the Metal Oxide Semiconductor (MOS) capacitor structure. The variation of flat-band voltages of the MOS structure was observed and discussed accordingly. Some interesting trapping/detrapping results related to the lanthanide aluminum oxide traps were identified for possible application in Flash memory technology. After understanding the trapping/detrapping mechanism of the high-k oxides, a solid foundation was prepared for further exploration into charge-trapping non-volatile memory in the future.

Hysteresis in Lanthanide Zirconium Oxides Observed Using a Pulse CV Technique and including the Effect of High Temperature Annealing

A powerful characterization technique, pulse capacitance-voltage (CV) technique, was used to investigate oxide traps before and after annealing for lanthanide zirconium oxide thin films deposited on n-type Si (111) substrates at 300 °C by liquid injection Atomic Layer Deposition (ALD). The results indicated that: (1) more traps were observed compared to the conventional capacitance-voltage characterization method in LaZrOx; (2) the time-dependent trapping/de-trapping was influenced by the edge time, width and peak-to-peak voltage of a gate voltage pulse. Post deposition annealing was performed at 700 °C, 800 °C and 900 °C in N2 ambient for 15 s to the samples with 200 ALD cycles. The effect of the high temperature annealing on oxide traps and leakage current were subsequently explored. It showed that more traps were generated after annealing with the trap density increasing from 1.41 × 1012 cm−2 for as-deposited sample to 4.55 × 1012 cm−2 for the 800 °C annealed one. In addition, the leakage current density increase from about 10−6 A/cm2 at Vg = +0.5 V for the as-deposited sample to 10−3 A/cm2 at Vg = +0.5 V for the 900 °C annealed one.

Electrical Properties and Interfacial Studies of HfxTi1–xO2 High Permittivity Gate Insulators Deposited on Germanium Substrates

In this research, the hafnium titanate oxide thin films, TixHf1–xO2, with titanium contents of x = 0, 0.25, 0.9, and 1 were deposited on germanium substrates by atomic layer deposition (ALD) at 300 °C. The approximate deposition rates of 0.2 Å and 0.17 Å per cycle were obtained for titanium oxide and hafnium oxide, respectively. X-ray Photoelectron Spectroscopy (XPS) indicates the formation of GeOx and germanate at the interface. X-ray diffraction (XRD) indicates that all the thin films remain amorphous for this deposition condition. The surface roughness was analyzed using an atomic force microscope (AFM) for each sample. The electrical characterization shows very low hysteresis between ramp up and ramp down of the Capacitance-Voltage (CV) and the curves are indicative of low trap densities. A relatively large leakage current is observed and the lowest leakage current among the four samples is about 1 mA/cm2 at a bias of 0.5 V for a Ti0.9Hf0.1O2 sample. The large leakage current is partially attributed to the deterioration of the interface between Ge and TixHf1–xO2 caused by the oxidation source from HfO2. Consideration of the energy band diagrams for the different materials systems also provides a possible explanation for the observed leakage current behavior.

Compliance current effect on switching behavior of hafnium oxide based RRAM

In this study, we compared the basic switching behaviors of HfO<inf>2</inf>, Al<inf>2</inf>O<inf>3</inf> and HfAlO<inf>x</inf> (Hf:Al=9:1) based RRAM with Ti top electrode by setting various compliance currents (1mA, 5mA, 10mA, 15mA). The resistance ratio of HfO<inf>2</inf> based RRAM (20 → 320) increases with compliance current whereas it drops not obviously for Al<inf>2</inf>O<inf>3</inf> based RRAM (85→54). HfAlO<inf>x</inf> (Hf:Al=9:1)) based one has the best resistance ratio (300–440) and resistance stability. All low resistance state (LRS) resistance values of three samples are around 100Ω with large compliance current while there is a difference in HRS resistance which causes the ratio difference accordingly. The dominant mechanism of resistive switching is the formation and rupture of the conductive filament composed of oxygen vacancies. The appropriate compliance current selection and doping technology to high-k materials should be considered in further study.

Influence of HfAlO composition on resistance ratio of RRAM with Ti electrode

Four HfAlO based resistive random access memory (RRAM) devices with different HfO2 percentage (0%, 10%, 90% and 100%) were fabricated using atomic layer deposition (ALD). Three types of electroforming processes were observed with 1mA current compliance (CC), including initial high resistance state (HRS), initial medium resistance state (MRS) and initial low resistance state (LRS). The modulation of resistance ratio (HRS/LRS) was achieved by controlling the ALD deposition cycle ratio of HfO<inf>2</inf>:Al<inf>2</inf>O<inf>3</inf>. The resistance ratio was improved by intermixing HfO<inf>2</inf> and Al<inf>2</inf>O<inf>3</inf> under 5mA compliance condition. This can be partially attributed to fact that intermixing HfO<inf>2</inf> and Al<inf>2</inf>O<inf>3</inf> stabilized the oxide matrix and suppressed crystallization.

Effects of biased irradiation on charge trapping in HfO2 dielectric thin films

This paper reports the low-dose-rate radiation response of Al-HfO2/SiO2–Si MOS devices, in which the gate dielectric was formed by atomic layer deposition (ALD) with 5-nm equivalent oxide thickness. The degradation of the devices was characterized by a pulse capacitance-voltage (CV) and on-site radiation response technique under continuous gamma (γ) ray exposure at a relatively low dose rate of 0.116 rad (HfO2)/s. Compared with conventional CV measurements, the proposed measurements extract significant variations of flat-band voltage shift of the hafnium based MOS devices. The large flat-band voltage shift is mainly attributed to the radiation-induced oxide trapped charges, which are not readily compensated by bias-induced charges produced over the measurement timescales (for timescales less than 5 ms). A negative flat-band voltage shift up to −1.02 V was observed under a positive biased irradiation with the total dose up to 40 krad (HfO2) and with the electric field of 0.5 MV/cm. This is attributed to ne...

Investigation of Anomalous Hysteresis in MOS Devices With ZrO 2 Gate Dielectrics

Abnormal capacitance-voltage (CV) behavior is observed in metal-oxide semiconductor devices with zirconium oxide-gate dielectrics using a pulse CV technique. The relative positions of forward and reverse CV traces measured by the pulse technique are opposite those by conventional CV measurement. This unusual phenomenon is inconsistent with charge trapping and de-trapping, but may be mainly attributable to the interface dipoles at the high-

Anomalous capacitance-voltage hysteresis in MOS devices with ZrO2 and HfO2 dielectrics

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Real-time and on-site γ-ray radiation response testing system for semiconductor devices and its applications

/SiOx interface. This anomaly is sensitive to growth temperature as well as the post-deposition annealing process. Lower deposition temperature leads to more interface dipoles. However, after annealing in either nitrogen or forming gas ambient, the relative positions of forward and reverse CV curves measured by the pulse technique are consistent with those obtained by conventional CV measurement.

Total Ionizing Dose Response of Hafnium-Oxide Based MOS Devices to Low-Dose-Rate Gamma Ray Radiation Observed by Pulse CV and On-Site Measurements

Anomalous behaviors in capacitance-voltage (CV) characteristics are observed on MOS devices with ZrO2 and HfO2 oxides. The relative positions of forward and reverse CV traces measured by pulse technique are opposite to those obtained by LCR meter. This unusual phenomenon cannot be consistently explained by trapping/de-trapping of charges. A hypothesis related to interface dipoles is proposed to provide a possible explanation.