Qingyu Lin

A Programmable SIMD Vision Chip for Real-Time Vision Applications

A programmable vision chip for real-time vision applications is presented. The chip architecture is a combination of a SIMD processing element array and row-parallel processors, which can perform pixel-parallel and row-parallel operations at high speed. It implements the mathematical morphology method to carry out low-level and mid-level image processing and sends out image features for high-level image processing without I/O bottleneck. The chip can perform many algorithms through software control. The simulated maximum frequency of the vision chip is 300 MHz with 16 times 16 pixels resolution. It achieves the rate of 1000 frames per second in real-time vision. A prototype chip with a 16 times 16 PE array is fabricated by the 0.18 standard CMOS process. It has a pixel size of 30 mum times 40 mum and 8.72 mum W power consumption with a 1.8 V power supply. Experiments including the mathematical morphology method and target tracking application demonstrated that the chip is fully functional and can be applied in real-time vision applications.

A 1,000 Frames/s Programmable Vision Chip with Variable Resolution and Row-Pixel-Mixed Parallel Image Processors

A programmable vision chip with variable resolution and row-pixel-mixed parallel image processors is presented. The chip consists of a CMOS sensor array, with row-parallel 6-bit Algorithmic ADCs, row-parallel gray-scale image processors, pixel-parallel SIMD Processing Element (PE) array, and instruction controller. The resolution of the image in the chip is variable: high resolution for a focused area and low resolution for general view. It implements gray-scale and binary mathematical morphology algorithms in series to carry out low-level and mid-level image processing and sends out features of the image for various applications. It can perform image processing at over 1,000 frames/s (fps). A prototype chip with 64 × 64 pixels resolution and 6-bit gray-scale image is fabricated in 0.18 μm Standard CMOS process. The area size of chip is 1.5 mm × 3.5 mm. Each pixel size is 9.5 μm × 9.5 μm and each processing element size is 23 μm × 29 μm. The experiment results demonstrate that the chip can perform low-level and mid-level image processing and it can be applied in the real-time vision applications, such as high speed target tracking.

A novel vision chip for high-speed target tracking

This paper presents a novel vision chip for high-speed target tracking. Two concise algorithms for high-speed target tracking are developed. The algorithms include some basic operations that can be used to process the real-time image information during target tracking. The vision chip is implemented that is based on the algorithms and a row-parallel architecture. A prototype chip has 64×64 pixels is fabricated by 0.35 µm complementary metal–oxide–semiconductor transistor (CMOS) process with 4.5×2.5 mm2 area. It operates at a rate of 1000 frames per second with 10 MHz chip main clock. The experiment results demonstrate that a high-speed target can be tracked in complex static background and a high-speed target among other high-speed objects can be tracked in clean background.

A High-Speed Target Tracking CMOS Image Sensor

The paper proposes a high-speed target tracking CMOS image sensor. The target tracking CMOS image sensor consists of an image sensor array, row-parallel processors, a controller and a SRAM. It implements two novel concise algorithms that composed of efficient operations: such as collision detection, separation detection and position extraction. A 64 times 64 pixel array high-speed target tracking CMOS image sensor chip was implemented in using 0.35 mum 2P4M CMOS process. An N-well/P-sub SAB diode without salicide is used as photodiode in the image sensor. The chip size is 4.5 mm times 2.5 mm. The measured results demonstrated that the chip can perform target tracking at the rate of 1000 fps with more functionality and less area than the reported digital chips. The chip power consumption is 30 mW at the main clock of 20 MHz.

A novel CMOS color pixel for vision chips

This paper presents a novel CMOS color pixel with a 2D metal-grating structure for real-time vision chips. It consists of an N-well/P-substrate diode without salicide and 2D metal-grating layers on the diode. The periods of the 2D metal structure are controlled to realize color filtering. We implemented sixteen kinds of the pixels with the different metal-grating structures in a standard 0.18µm CMOS process. The measured results demonstrate that the N-well/P-substrate diode without salicide and with the 2D metal-grating structures can serve as the high speed RGB color active pixel sensor for real-time vision chips well.

A high-speed CMOS image sensor for real-time vision chip

A high-speed CMOS image sensor for real-time vision chip is proposed. The high-speed CMOS image sensor consists of CMOS photodiode array, correlated double sampling(CDS) array, programmable gain amplifier(PGA) array, area-efficient single-slope analog-to-digital converter(ADC) array and controller circuit. It can perform the image capturing and row-parallel signal processing. It outputs digital signal or digital image at a frame rate of over1000 frame/s. It can reduce the fixed pattern noise(FPN) and amplify(or shrink) the output signals of the photodiode array to maintain the amplitude of the signal in row-parallel fashion. It can continuously perform8-bit ADC conversion in row-parallel. A128 pixel×128 pixel image sensor with128 rows of CDS, PGA and single-slope ADC is fabricated by using0.18μm1P6M CMOS process. The chip size is2.2 mm×2.6 mm. The measured results demonstrate that the designed chip can perform high-speed real-time optical signal capturing and processing. It can be applied to the real-time vision chip system.

A Novel Vision Chip for High-Speed Target Tracking

This paper presents a novel vision chip for high-speed target tracking. Two concise algorithms for high-speed target tracking are developed. The algorithms include some basic operations that can be used to process the real-time image information during target tracking. The vision chip is implemented that is based on the algorithms and a row-parallel architecture. A prototype chip has 64 x 64 pixels is fabricated by 0.35 pm complementary metal-oxide-semiconductor transistor (CMOS) process with 4.5 x 2.5 mm(2) area. It operates at a rate of 1000 frames per second with 10 MHz chip main clock. The experiment results demonstrate that a high-speed target can be tracked in complex static background and a high-speed target among other high-speed objects can be tracked in clean background.