R.A. Novotny

Five-stage free-space optical switching network with field-effect transistor self-electro-optic-effect-device smart-pixel arrays

The design, construction, and operational testing of a five-stage, fully interconnected 32 × 16 switching fabric by the use of smart-pixel (2, 1, 1) switching nodes are described. The arrays of switching nodes use monolithically integrated GaAs field-effect transistors, multiple-quantum-well p-i-n detectors, and self-electro-optic-device modulators. Each switching node incorporates 25 field-effect transistors and 17 p-i-n diodes to realize two differential optical receivers, the 2 × 1 node switching logic, a single-bit node control memory, and one differential optical transmitter. The five stages of node arrays are interconnected to form a two-dimensional banyan network by the use of Fourier-plane computer-generated holograms. System input and output are made by two-dimensional fiber-bundle matrices, and the system optical hardware design incorporates frequency-stabilized lasers, pupil-division beam combination, and a hybrid micro-macro lens for fiber-bundle imaging. Optomechanical packaging of the system ut lizes modular kinematic component positioning and active thermal control to enable simple rapid assembly. Two preliminary operational experiments are completed. In the first experiment, five stages are operated at 50 Mbits/s with 15 active inputs and outputs. The second experiment attempts to operate two stages of second-generation node arrays at 155 Mbits/s, with eight of the 15 active nodes functioning correctly along the straight switch-routing paths.

Six-stage digital free-space optical switching network using symmetric self-electro-optic-effect devices

We describe the design and demonstration of an extended generalized shuffle interconnection network, centrally controlled by a personal computer. A banyan interconnection pattern is implemented by use of computer-generated Fourier holograms and custom metallization at each 32 × 32 switching node array. Each array of electrically controlled tristate symmetric self-electro-optic-effect devices has 10,240 optical pinouts and 32 electrical pinouts, and the six-stage system occupies a 9 in. × 12.5 in. (22.9 cm × 31.7 cm) area. Details of the architecture, optical and mechanical design, and system alignment and tolerancing are presented.

Fabrication of fiber bundle arrays for free-space photonic switching systems

We describe a technique for assembling fiber bundle arrays as needed in optical computing and photonic switching systems. Two 4 x 4 arrays with single-mode and multimode optical fibers were manufactured. Fiber ends were located to within 3 μm of their ideal position and to a pointing precision of 30 arcmin. A third 4 x 8 array was manufactured with single-mode fibers, and fiber ends were located to within 1.5 μm of their ideal position.

Optoelectronic ATM switch employing hybrid silicon CMOS/GaAs FET-SEEDs

In the past few years, the demand for telecommunications services beyond voice telephony has skyrocketed. For the growth of these services to continue at this rate, cost effective means of transporting and switching large amounts of information must be found. Although fiber optic transmission has significantly reduced the cost of transmission, switching high bandwidth signals remains expensive. While all electronic switching systems are certainly possible for these high bandwidth systems, considerable effort has been expended to reduce the cost of fiber optic connections between frames or racks of equipment separated by several meters. As an example, one can envision fiber-optic data links connecting the line units that receive and transmit data from the outside world with an electronic switching fabric. Optical data links, ODLs, can perform the optical to electrical conversions. Several of these optical data links can be electrically connected with electronic switching chips on a printed circuit board. As the demand for bandwidth increases, several hundred to several thousand optical fibers might be incident on the switching fabric. Discrete optical data links and parallel data links with up to 32 fibers per data link remain an expensive solution to transporting this information due to their per-link cost, physical size, and power dissipation. Power dissipation on the switching chips is high because of the need for electronic drivers for the high speed electrical interconnections between the switching chips and the data links. By integrating the O/E conversions directly onto the switching chips, lower cost and higher density systems can be built. In this paper, we describe preliminary results of an experimental optoelectronic switching network based on this lower cost solution. The network is designed to be part of an asynchronous transfer mode (ATM) network based on the Growable Packet Architecture. The switching chip consists of GaAs/AlGaAs multiple quantum well modulators and detectors flip- chip bonded to silicon VLSI circuitry. The optical system images the inputs from a two dimensional fiber bundle onto the switching chip, provides optical fan-out of the signals from the fibers to the switching chip, and images the outputs from the chip onto the fiber bundle.

Field effect transistor-self electrooptic effect device (FET-SEED) differential transimpedance amplifiers for two-dimensional optical data links

A 4/spl times/18 two-dimensional array of GaAs FET-SEED (field effect transistor-self electrooptic effect device) differential transimpedence receivers has been fabricated for application in massively parallel optical data link board-to-board interconnections. Several FET-SEED receiver arrays were tested and displayed a mean response of /spl sim/0.7 mV//spl mu/W, and were capable of >100 Mbps per channel operation. The mean receiver sensitivity for a BER of >

Parallel optical data links using VCSELs

Vertical cavity surface emitting lasers (VCSELs) have the potential to provide massively parallel 2D free space chip-to- chip and fiber guided board to board optical interconnections. We describe the construction and performance of two prototype optical data links (2D-ODL). One prototype used direct modulation of a 2 X 18 array of fiber pigtailed VCSELs. The other 2D-ODL attempted to use an 8 X 18 VCSEL array as an optical power source for a symmetric self-electooptic effect device reflection modulator array.

Receiver design issues for parallel optical interconnections fabricated in the FET-SEED technology

This paper discusses the sensitivity limitations of smart pixel optical receiver arrays fabricated in the GaAs FET-SEED technology. Four circuit topologies (high impedance clamped, resistive load partially clamped, differential transamp, and common gate) are compared. Simulated and experimental data are presented.

Low-threshold reliable vertical-cavity surface-emitting laser arrays for system applications

Long lasting vertical-cavity surface-emitting lasers (VC-SELs) are reported for system applications. The 2700 hours of operation at 50 degree(s)C indicates approximately equals 0.5%/Khr degradation rate predicting mean time to failure of approximately equals 105 hours. The substrate temperatures ranged from 20 degree(s)C to 65 degree(s)C.

Two dimensional optical data links

The complexity and size of interconnection rich telephone switching systems requires the extension of data buses over a large complement of frames. Physical designers have chosen bit serial transport over fiber to overcome the limitations of coax. It has been shown that for certain optical data link applications there exists an optimum degree of parallelism (based on cost) depending on the data rate and the number of the channels. Prototype One Dimensional Optical Data Links (1D-ODL) using linear 1/spl times/n device arrays, have been demonstrated in a number of laboratories, taking advantage of the current infrastructure of fiber ribbon, splices, and connectors. Extending this concept to a second dimension creating a Two Dimensional Optical Data Link (2D-ODL) using n/spl times/m device arrays, may yield further economies of scale. We have constructed several prototype 2D-ODLs using direct modulation of 2D arrays of Vertical Cavity Surface Emitting Lasers (VCSELs), and Symmetric Self-Electrooptic Effect Device (S-SEED) reflection modulators with Silicon p-i-n/bipolar OEIC receivers. Most recently we studied a 4/spl times/18 2D-ODL using S-SEED reflection modulators and FET-SEED OEIC receiver arrays. 2D-ODL system demonstrations to date are described, and benefits and drawbacks of each technology are discussed.<<ETX>>

Analysis of pulse width distortion within an optoelectronic switching system demonstrator

This talk focuses on the sources of pulse width distortion (PWD) within our asynchronous optoelectronic switching system. A block diagram depicting the data path of this system is shown, with the signal originating at the input wavelength conversion boards and terminating at the output wavelength conversion boards. Wavelength conversion is necessary, since the ATM-UNI specifies 1300nm, and our optoelectronic chip operates at 850nm.