R. K. Lal

An analytical model of a double-heterostructure mid-infrared photodetector

Abstract A complete analytical model of a mid-infrared (MIR) double heterostructure (DH) photodetector has been developed. The model is physics based and takes into account all the dominant mechanisms that shape the characteristics of room temperature MIR DH photodetectors. It can be used to characterize theoretically the performance of narrow bandgap III–V based semiconductor MIR photodetectors for non-telecommunication applications. The model has been applied to estimate the detectivity, photoresponse and quantum efficiency of an P + –As 0.55 Sb 0.15 P 0.30 /n 0 –InAs 0.89 Sb 0.11 /N + –InAs 0.55 Sb 0.15 P 0.30 DH MIR photodetector. The results obtained on the basis of the model are in good agreement with reported experimental findings. The simulation code developed can be used as a tool by the design engineers for useful fabrication guidelines.

Effect of Temperature on Dark Current in QWIP for Unmanned Aerial Vehicles

This paper deals with results of optimizing the structure and temperature effects leading to dark or noise current mitigation in quantum well IR photodetector (QWIP) using mathematical modeling. The quantum wells are formed by heteroepitaxial process where a narrow E GAP material between wide bandgap materials. Results show that the fine tuning of aluminum (Al) mole fraction and well-width helps in achieving high responsivity for the both near and far IR wavelength. Low noise operation, as well as comparative study, is done between the experimental and theoretical value for temperature analysis. The modeled QWIP detector consists of GaAs quantum wells and Al x Ga(1−x)As barriers. The temperature-based operation and analyses show the cause of band splitting, and reduction of noise is observed in MQW IR sensor structure. This type of QW finds application in broadband sensors used in unmanned aerial vehicles (UAV).

Grounded resistor/capacitor controlled multi-phase sinusoidal oscillator using DDCCCs

The authors describe a new oscillator circuit that produces three sinusoidal outputs with different phase angles, using CMOS based Differential Difference Complimentary Current Conveyor (DDCCC), which is based on CMOS technology. The proposed circuit consists of three DDCCCs, a couple of resistors and a couple of capacitors, out of which both resistors and one capacitor are grounded. The described circuit provides three sinusoidal outputs at the same time with different phase angles. Tuning of the circuit can be easily performed by through grounded resistor or grounded capacitor. The characteristics of the oscillator are verified from the simulated results using SPICE 0.5 μm MIETECH level-3 model parameters. Results of simulation are finely agreeing with expected theoretical ones. The topology yields low sensitivities and is therefore convenient for VLSI implementation.

An improved low power high speed Full Adder design with 28nm for extended region of operation

This work holds the objective of investigating the performance of conventional Full Adders (FA) at 28nm regime and then proposes a Transmission Gate (TG) based improved FA circuit of reduced Power Delay Product (PDP). In this design the XOR/XNOR nodes have been optimized to operate at submicron level with lower delay. The work provides full voltage swing even at lower operating voltage by avoiding the threshold loss problem. The low leakage feature of TG technology allows it to deliver high energy efficiency. The modified circuit achieves up to 59.14% and 59.36% improvements in worst case delay and PDP respectively as compared to the conventional TG based FA cells for low power mode of operation. Particularly at lower voltage range and higher speed, the performance is considerably fair. Simulations show that the modified FA circuit is efficient in terms of delay as well as extended region of operation. All simulations are performed with Cadence Virtuoso tool and Eldo simulator for 28nm FDSOI technology.