Rajat Goel
Apple Inc.
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Publication
Featured researches published by Rajat Goel.
international solid-state circuits conference | 2007
Zongjian Chen; Priya Ananthanarayanan; Sukalpa Biswas; Brian J. Campbell; Hao Chen; Shaishav Desai; Dominic Go; Rajat Goel; V. von Kaenel; J. Kassoff; Fabian Klass; Weichun Ku; T. Li; J. Lin; Khurram Z. Malik; Anup S. Mehta; Daniel C. Murray; E. Shiu; C. Shuler; Sribalan Santhanam; Gregory S. Scott; Junji Sugisawa; Toshinari Takayanagi; H. John Tarn; Pradeep R. Trivedi; James Wang; Ricky Wen; John Yong
An SoC is presented with dual 2GHz Powertrade cores, coherent crossbar interconnect, 2MB L2 cache, and memory and I/O subsystem. The chip consumes a maximum of 25W of power. The 115mm2 die is implemented in a 65nm 8M process with low-power design techniques. Circuits to improve system performance under power constraints are discussed
Archive | 2010
Rajat Goel; Ian D. Kountanis
Archive | 2013
John H. Mylius; Rajat Goel; Pradeep Kanapathipillai; Hari S. Kannan
Archive | 2014
Rajat Goel; Mridul Agarwal
Archive | 2013
Pradeep Kanapathipillai; Hari S. Kannan; Po-Yung Chang; Ming-Ta Hsu; Rajat Goel
Archive | 2009
Rajat Goel; Chen-Ju Hsieh
Archive | 2013
Rajat Goel; Sandeep Gupta; Yamini Modukuru
Archive | 2011
Ramesh Gunna; Peter J. Bannon; Rajat Goel
Archive | 2017
Harsha Krishnamurthy; Mridul Agarwal; S Balasubramanian; Christopher S. Thomas; Rajat Goel; Rohit Kumar; Muthukumaravelu Velayoudame
Archive | 2015
Rajat Goel; Hari S. Kannan; Khurram Z. Malik