Rajeev J. Ram

Single-chip microprocessor that communicates directly using light

Data transport across short electrical wires is limited by both bandwidth and power density, which creates a performance bottleneck for semiconductor microchips in modern computer systems—from mobile phones to large-scale data centres. These limitations can be overcome by using optical communications based on chip-scale electronic–photonic systems enabled by silicon-based nanophotonic devices8. However, combining electronics and photonics on the same chip has proved challenging, owing to microchip manufacturing conflicts between electronics and photonics. Consequently, current electronic–photonic chips are limited to niche manufacturing processes and include only a few optical devices alongside simple circuits. Here we report an electronic–photonic system on a single chip integrating over 70 million transistors and 850 photonic components that work together to provide logic, memory, and interconnect functions. This system is a realization of a microprocessor that uses on-chip photonic devices to directly communicate with other chips using light. To integrate electronics and photonics at the scale of a microprocessor chip, we adopt a ‘zero-change’ approach to the integration of photonics. Instead of developing a custom process to enable the fabrication of photonics, which would complicate or eliminate the possibility of integration with state-of-the-art transistors at large scale and at high yield, we design optical devices using a standard microelectronics foundry process that is used for modern microprocessors. This demonstration could represent the beginning of an era of chip-scale electronic–photonic systems with the potential to transform computing system architectures, enabling more powerful computers, from network infrastructure to data centres and supercomputers.

Building Manycore Processor-to-DRAM Networks with Monolithic Silicon Photonics

We present a new monolithic silicon photonics technology suited for integration with standard bulk CMOS processes, which reduces costs and improves opto-electrical coupling compared to previous approaches. Our technology supports dense wavelength-division multiplexing with dozens of wavelengths per waveguide. Simulation and experimental results reveal an order of magnitude better energy-efficiency than electrical links in the same technology generation. Exploiting key features of our photonics technology, we have developed a processor-memory network architecture for future manycore systems based on an opto-electrical global crossbar. We illustrate the advantages of the proposed network architecture using analytical models and simulations with synthetic traffic patterns. For a power-constrained system with 256 cores connected to 16 DRAM modules using an opto-electrical crossbar, aggregate network throughput can be improved by ap8-10times compared to an optimized purely electrical network.

Monolithic integration of room-temperature cw GaAs/AlGaAs lasers on Si substrates via relaxed graded GeSi buffer layers

GaAs/AlxGa(1−x)As quantum well lasers have been demonstrated via organometallic chemical vapor deposition on relaxed graded Ge/GexSi(1−x) virtual substrates on Si. A number of GaAs/Ge/Si integration issues including Ge autodoping behavior in GaAs, reduced critical thickness due to thermal expansion mismatch, and complications with mirror facet cleaving have been overcome. Despite unoptimized laser structures with high series resistance and large threshold current densities, surface threading dislocation densities for GaAs/AlGaAs lasers on Si substrates as low as 2×106 cm−2 permitted continuous room-temperature lasing at a wavelength of 858 nm. The laser structures are uncoated edge-emitting broad-area devices with differential quantum efficiencies of 0.24 and threshold current densities of 577 A/cm2. Identical devices grown on commercial GaAs substrates showed similar behavior. This comparative data agrees with previous measurements of near-bulk minority carrier lifetimes in GaAs grown on Ge/GeSi/Si subst...

Photonic ADC: overcoming the bottleneck of electronic jitter

Accurate conversion of wideband multi-GHz analog signals into the digital domain has long been a target of analog-to-digital converter (ADC) developers, driven by applications in radar systems, software radio, medical imaging, and communication systems. Aperture jitter has been a major bottleneck on the way towards higher speeds and better accuracy. Photonic ADCs, which perform sampling using ultra-stable optical pulse trains generated by mode-locked lasers, have been investigated for many years as a promising approach to overcome the jitter problem and bring ADC performance to new levels. This work demonstrates that the photonic approach can deliver on its promise by digitizing a 41 GHz signal with 7.0 effective bits using a photonic ADC built from discrete components. This accuracy corresponds to a timing jitter of 15 fs - a 4-5 times improvement over the performance of the best electronic ADCs which exist today. On the way towards an integrated photonic ADC, a silicon photonic chip with core photonic components was fabricated and used to digitize a 10 GHz signal with 3.5 effective bits. In these experiments, two wavelength channels were implemented, providing the overall sampling rate of 2.1 GSa/s. To show that photonic ADCs with larger channel counts are possible, a dual 20-channel silicon filter bank has been demonstrated.

Open foundry platform for high-performance electronic-photonic integration

This paper presents photonic devices with 3 dB/cm waveguide loss fabricated in an existing commercial electronic 45 nm SOI-CMOS foundry process. By utilizing existing front-end fabrication processes the photonic devices are monolithically integrated with electronics in the same physical device layer as transistors achieving 4 ps logic stage delay, without degradation in transistor performance. We demonstrate an 8-channel optical microring-resonator filter bank and optical modulators, both controlled by integrated digital circuits. By developing a device design methodology that requires zero process infrastructure changes, a widely available platform for high-performance photonic-electronic integrated circuits is enabled.

Building Many-Core Processor-to-DRAM Networks with Monolithic CMOS Silicon Photonics

Silicon photonics is a promising technology for addressing memory bandwidth limitations in future many-core processors. This article first introduces a new monolithic silicon-photonic technology, which uses a standard bulk CMOS process to reduce costs and improve energy efficiency, and then explores the logical and physical implications of leveraging this technology in processor-to-memory networks.

CCD-based thermoreflectance microscopy: principles and applications

CCD-based thermoreflectance microscopy has emerged as a high resolution, non-contact imaging technique for thermal profiling and performance and reliability analysis of numerous electronic and optoelectronic devices at the micro-scale. This thermography technique, which is based on measuring the relative change in reflectivity of the device surface as a function of change in temperature, provides high-resolution thermal images that are useful for hot spot detection and failure analysis, mapping of temperature distribution, measurement of thermal transient, optical characterization of photonic devices and measurement of thermal conductivity in thin films. In this paper we review the basic physical principle behind thermoreflectance as a thermography tool, discuss the experimental setup, resolutions achieved, signal processing procedures and calibration techniques, and review the current applications of CCD-based thermoreflectance microscopy in various devices.

Nanophotonic integration in state-of-the-art CMOS foundries

We demonstrate a monolithic photonic integration platform that leverages the existing state-of-the-art CMOS foundry infrastructure. In our approach, proven XeF2 post-processing technology and compliance with electronic foundry process flows eliminate the need for specialized substrates or wafer bonding. This approach enables intimate integration of large numbers of nanophotonic devices alongside high-density, high-performance transistors at low initial and incremental cost. We demonstrate this platform by presenting grating-coupled, microring-resonator filter banks fabricated in an unmodified 28 nm bulk-CMOS process by sharing a mask set with standard electronic projects. The lithographic fidelity of this process enables the high-throughput fabrication of second-order, wavelength-division-multiplexing (WDM) filter banks that achieve low insertion loss without post-fabrication trimming.

All-optical wavelength converter and switch based on electromagnetically induced transparency

We propose a method for all-optical switching and wavelength conversion using electromagnetically induced transparency (EIT). We discuss the mechanism for the transfer of information in this scheme and determine the conditions for which N×N wavelength conversion can be realized. We compare the properties and limits of an EIT-based switch to conventional wavelength converters.

Optimization of Heat Sink–Limited Thermoelectric Generators

Many recent advances in thermoelectrics have focused on the nanoscale engineering of materials for higher figure of merit (Z). A thermoelectric generator using these thin-film materials can present new challenges due to its inherently large temperature gradient, but also correspondingly larger generated power if the heat can be managed. In such cases performance is expected to be limited as much by the heat sink as by intrinsic material properties. New criteria for optimizing the generated power density of devices in this regime are discussed here The effects of future material improvements on performance are studied, with the surprising result that optimizing material Z is not the best strategy for optimizing efficiency or power in this regime. The theory is tested with a numerical solution of the Onsager relations. This work was supported by the ONR.