Rakesh Vaid

Characterization of Carbon Nanotube Field Effect Transistor Using Simulation Approach

As the size of the Si MOSFET approaches towards its limiting value, various short channel effects appear to affect its performance. Carbon nanotube field effect transistor (CNTFET) is one of the novel nanoelectronic devices that overcome those MOSFETs limitations. In this paper we have studied the effect of scaling carbon nanotube (CNT) diameter, insulator thickness and high-k dielectric materials on current-voltage characteristics of co-axial gated ballistic n-type CNTFET. The device metrics such as drive current (Ion), leakage current (Ioff), Ion/Ioff ratio, transconductance, subthreshold slope (S) and drain induced barrier lowering (DIBL) are also studied in this paper. The simulation results obtained are then compared with conventional nanoscale n-type MOSFET. It has been concluded that CNTFET seem to provide better performance than conventional nanoscale n-type MOSFET in term of high speed capability and lower switching power consumption.

Al/HfO2/Si Gate Stack with Improved Physical and Electrical Parameters

In this paper, we present the fabrication and characterization of Al/HfO2/Si gate stack with improved physical and electrical gate stack parameters such as dielectric constant (k), equivalent oxide thickness (EOT), interface trap density (Dit) and effective oxide charges (Qeff) extracted from the C-V and G-V characteristics. Atomic layer deposition (ALD) has been used for high-k dielectric formation. The effect of rapid thermal annealing (RTA) temperatures on the properties of the fabricated gate stack has also been investigated at 300 °C & 600 °C for 3 minutes in nitrogen (N2) ambient whereas forming gas annealing (FGA) was performed at 420°C for 20 minutes in 96% N2 and 4% H2 ambient. Fourier transform infrared spectroscopy (FTIR) was used to study of thermal annealing effects on the HfO2/Si interface. Filmetrics F20 thin film analyzer and XRD were used to find thickness and composition of the material respectively. The results reveal that the physical and electrical properties (K, Dit, Qeff, etc) have been improved by RTA in nitrogen ambient, which further improves the interface properties of HfO2/Si due to the densification of HfO2 thin films. It is also shown that the 600°C nitrogen annealed samples exhibit a reduced EOT 2.54 nm, interfacial trap density, effective oxide charges (Qeff), C - V hysteresis and leakage current.

Impact of SWCNT Band Gaps on the Performance of a Ballistic Carbon Nanotube Field Effect Transistors (CNTFETs)

Band gap is an important property in designing single-walled carbon nanotube (SWCNT) for nanoelectronic devices. This paper describes the impact of SWCNT band gaps on the performance of a ballistic carbon nanotube field effect transistor (CNTFET) using the 2D numerical simulator. The results demonstrate that with the reduction in SWCNT band gap the performance parameters such as transconductance, output conductance, Ion/Ioff current ratio, gain, and carrier injection velocity enhanced while the short channel effects subthreshold slope and drain-induced barrier lowering get suppressed. The enhanced device performance and reduced short channel effects of CNTFET with the reduction in SWCNT band gaps signifying that the CNTFET is a suitable nanoelectronic device for amplification purposes, low power analog and digital circuits, high-speed and low power applications.

Study of gate all around InAs/Si based nanowire FETs using simulation approach

In this paper, a gate-all-around Si Nanowire FET (NWFET) and InAs NWFET have been studied and compared with respect to various performance parameters. The device metrics considered at the nanometer scale are transfer characteristics, transconductance, output characteristics, drive and leakage current, switching speed (Ion/Ioff), conduction-band profile, subthreshold swing (SS) and drain induced barrier lowering (DIBL). It has been shown that InAs channeled NWFET has higher mobility and hence higher transconductance, whereas Si NWFET shows better immunity towards short channel effects with lower leakage current, lower sub-threshold slope, lower DIBL. Therefore, Si NWFET appears to be applicable for Low Operating Power applications whereas, InAs with its high ON currents and switching speeds prove to be a good candidate for high performance applications of the long term ITRS where reasonably high leakage currents are acceptable as a trade off for increased operating speeds.

Impact of Scaling Gate Oxide Thickness on the Performance of Silicon Based Triple Gate Rectangular Nwfet

Previously, simulations were carried out on the classical drift diffusion technique which no longer supports the present day criteria in a 3D domain. Now-a-days, we enhance our simulation capabilities by performing simulation at an atomistic level rather than bulk which gives us best result in a 3D domain. To fulfill this requirement, the first full-band quantum and atomistic transport simulator OMEN is designed for post CMOS devices. In this paper, we have investigated the effect of scaling gate oxide thickness of rectangular Si-NWFET on its device performance in terms of transfer characteristics, output characteristics, electron doping, drive current (Ion), leakage current (Ioff), switching speed (Ion/Ioff) and transconductance. We concluded that the conductivity of Si-NWFET and doping density of electrons in Si-NWFET enhances with the reduction in oxide thickness. Also, we have concluded that with the reduction in oxide thickness, drive current of the device increases and leakage current of the device decreases which is an improvement over CNTs and conventional MOSFETs. Further, the switching speed (Ion/Ioff) of the device and transconductance (gm) enhances by reducing the oxide thickness.

A New Superjunction Power MOSFET with Oxide-Pillar-in-Drift Region

In this paper, we propose a new SJMOSFET with oxide pillar in its drift region that shows an improvement in its breakdown performance and relation between the Bv and Ron become more linear as compared to the conventional SJMOSFET due to a reduction in the vertical electric field. Simulations has been done using PISCES-II device simulator. The effect of oxide pillar width has also been done and analyzed.

Novel Attributes in Scaling Issues of an InSb-Nanowire Field-Effect Transistor

Due to the inherently lower bandgap and larger permittivity of III–V materials, III–V MOSFETs are more susceptible to short-channel effects (SCE). They show promising improvement in drain-induced barrier lowering (DIBL), due to suppressed SCE. In this paper, we present a scaling study of nanowire field-effect transistors (NWFETs) using a two-dimensional model and explore the scaling issues in device performance focusing on transconductance characteristics, output characteristics, average velocity, Switching speed, subthreshold swing and with different gate oxide thicknesses (tox) and nanowire diameters. Also, our results show the output conductance, transconductance, voltage gain and average electron velocity at the top of the barrier get improved in NWFETs with thinner tox and larger nanowire diameter.

Impact of Silicon Body Thickness on the Performance of Gate-all-around Silicon Nanowire Field Effect Transistor

As the size of the MOSFET is reduced, various short channel effects (SCEs) appears that degrade its performance. Multigate nanowire FET is one of the novel nanoelectronic devices that overcome these MOSFET limitations. The silicon nanowire field effect transistors with multiple gates around the silicon channel can significantly improve the gate control and are considered to be promising candidates for the next generation transistors. In this paper, we have considered the performance limits of Si nanowire field effect transistors in a Gate All Around (GAA) structure. Furthermore, we have studied the effects of Silicon body thickness on the characteristics of GAA silicon nanowire FET. It has been observed that Si-NWFET afford high drive-current (Ion), high transconductance and hence high gain. Thus, GAA configuration has good control of gate, which reduces the short-channel effects to a great extent.