Ralf Doerner

Analysis of the Survivability of GaN Low-Noise Amplifiers

This paper presents a detailed analysis of the stressing mechanisms for highly rugged low-noise GaN monolithic-microwave integrated-circuit amplifiers operated at extremely high input powers. As an example, a low-noise amplifier (LNA) operating in the 3-7-GHz frequency band is used. A noise figure (NF) below 2.3 dB is measured from 3.5 to 7 GHz with NF<1.8 dB between 5-7 GHz. This device survived 33 dBm of available RF input power for 16 h without any change in low-noise performance. The stress mechanisms at high input powers are identified by systematic measurements of an LNA and a single high electron-mobility transistor in the frequency and time domains. It is shown that the gate dc current, which occurs due to self-biasing, is the most critical factor regarding survivability. A series resistance in the gate dc feed can reduce this gate current by feedback, and may be used to improve LNA ruggedness

A peeling algorithm for extraction of the HBT small-signal equivalent circuit

Direct extraction is the most accurate method for the determination of equivalent-circuits of heterojunction bipolar transistors (HBTs). The method is based on first determining the parasitic elements and then the intrinsic elements analytically. The accuracy and robustness of the whole algorithm therefore is determined by the quality of the extraction of the extrinsic elements. This paper focuses on a new extraction method for the extrinsic capacitances which have proven to be the main source of uncertainty compared to the other extrinsic parameters. Concerning the intrinsic parameters, all the elements are extracted using exact closed-form equations, including exact expressions for the base-collector capacitances, which model the distributed nature of the base. The expressions for the base-collector capacitances are valid for both the hybrid-/spl pi/ and the physics-based T-topology equivalent circuits. Extraction results for InP HBT devices on measured S-parameters up to 100 GHz demonstrate good modeling accuracy.

Direct extraction of HBT equivalent-circuit elements

We present an analytical method for determining the heterojunction bipolar transistors (HBTs) equivalent-circuit elements. Its special feature is that it does not need measurements of test structures nor optimizations. The new algorithm for extracting the intrinsic elements exploits the information contained in the frequency dependence of the network parameters. This leads to a fast algorithm with a unique solution. The method is validated treating GaInP-GaAs HBTs.

Scalable GaInP/GaAs HBT large-signal model

A scalable large-signal model for heterojunction bipolar transistors (HBTs) is presented. It allows exact modeling of all transistor parameters from single finger elementary cells to multifinger power devices. The scaling rules are given in detail. The model is verified by comparison with measurements of GaInP/GaAs-HBTs.

Verification of the wafer-level LRM+ calibration technique for GaAs applications up to 110 GHz

In this article the accuracy of the LRM+ calibration is compared to that of the benchmark NIST multiline TRL procedure for the first time. The comparison is performed on NIST verified GaAs coplanar waveguide calibration reference material 8130. The NIST calibration comparison method is used to quantify the difference between measured S-parameters corrected by NIST multiline TRL and an advanced LRM+ calibration. The worst-case error bounds for LRM+ corrected S-parameter measurements are determined up to 110 GHz. It is demonstrated that the difference between benchmark multiline TRL and LRM+ is comparable with the measurement system drift. Verification results prove that LRM+ can be successfully used for accurate GaAs on-wafer calibration with customized standards. This overcomes some drawbacks of multiline TRL while providing the same calibration accuracy.

Unified model for collector charge in heterojunction bipolar transistors

The base-collector capacitance and the collector transit-time in GaAs-based heterojunction bipolar transistors depend not only on base-collector voltage, but also on collector current. This has to be taken into account in a large-signal model. However, since collector transit-time and capacitance are both caused by the charge stored in the collector space-charge region, it is not possible to model them independently of each other. This paper investigates the interrelation between collector capacitance and transit-time due to transcapacitance effects, and presents an analytical unified description for both quantities, that is derived from measurement-extracted small-signal equivalent circuits. The model is verified by comparison of simulation and measurement data.

Experimental evaluation of microwave field-effect-transistor noise models

Extensive GaAs field-effect-transistor noise measurements are used to compare noise models with the aim of recommending the most useful one for monolithic-microwave integrated-circuit design. The evaluation is based on noise and S-parameter measurements of metal-semiconductor field-effect transistors and high electron-mobility transistors with different gatewidths in the frequency range of 0.05-26 GHz. The models under investigation differ in the number of independent coefficients necessary to calculate the four noise parameters of the device. The broad frequency range including radio-frequency frequencies down to 50 MHz requires two different noise measurement systems with special modifications for optimum performance. In conclusion, the two-parameter Pospieszalski model turns out to be the most suitable one.

RF Probe Technology: History and Selected Topics

Today, radio-frequency (RF) wafer probes play an important role in almost every step of the RF products lifecycle: from technology development, model parameter extraction, design verification, and debug to small-scale and final production test. By using RF probes, it became possible to measure true characteristics of the RF components at the wafer level. This halved research and development times and lowered the enormous costs of developing new products.

Consistent modeling of capacitances and transit times of GaAs-based HBTs

This paper investigates how time delays and capacitances observed under small-signal conditions can be consistently accounted for in heterojunction bipolar transistor (HBT) large-signal models. The approach starts at the circuit level by mapping the large-signal equivalent circuit (which consists of charge and current sources) to the well-known small-signal circuit (which consists of capacitances, transit-time, and resistances). It is shown that and how bias dependent charge sources at either pn-junction impact transit-time, base-collector capacitance, and their mutual dependence. It is demonstrated for the example of a GaAs-based HBT that the interrelation of the elements is observed in measurements as predicted. The results of the investigation enhance understanding of HBT model characteristics and provide a criterion to check model consistency.

Calibration Standards Verification Procedure Using the Calibration Comparison Technique

This article examines the verification procedure of coplanar calibration standards based on the calibration comparison technique. For the first time, different commercially available alumina calibration substrates were compared using the NIST multiline TRL calibration procedure, calibration comparison approach, and the NIST GaAs CPW calibration reference material RM8130. The characteristic impedance of the verified calibration line standards is extracted using the multiline TRL procedure and the definition of the load standard resistance. The error circuit, describing difference of the substrate medium and the standard design is extracted. Finally, the worst case error bounds for the measurement of passive devices compared to the reference multiline TRL on the RM8130 are calculated for each tested substrate