Ralf Eickhoff

Robustness of radial basis functions

Neural networks are intended to be used in future nanoelectronic technology since these architectures seem to be robust to malfunctioning elements and noise in its inputs and parameters. In this work, the robustness of radial basis function networks is analyzed in order to operate in noisy and unreliable environment. Furthermore, upper bounds on the mean square error under noise contaminated parameters and inputs are determined if the network parameters are constrained. To achieve robuster neural network architectures fundamental methods are introduced to identify sensitive parameters and neurons.

Tolerance of radial basis functions against stuck-at-faults

Neural networks are intended to be used in future nanoelectronic systems since neural architectures seem to be robust against malfunctioning elements and noise in their weights. In this paper we analyze the fault-tolerance of Radial Basis Function networks to Stuck-At-Faults at the trained weights and at the output of neurons. Moreover, we determine upper bounds on the mean square error arising from these faults.

SIRENS: A Simple Reconfigurable Neural Hardware Structure for artificial neural network implementations

Artificial neural networks are used in various applications and research areas. Mathematically inspired approaches use these types of networks to solve complex classification or function approximation tasks whereas biologically motivated models attempt to adapt desired properties from biology such as robustness or fault tolerance to technical systems and architectures. Therefore, a great variety of different models have been proposed in literature which can be separated in time-dependent and time-independent models. To verify these models and to accelerate simulations prototypes are often implemented in integrated circuits using digital or analog designs. In this work, a simple reconfigurable neural hardware structure (SIRENS) is introduced which is capable to represent several different models of neurons, time-independent and time-dependent models as well. Therefore, this system can be used for several applications (classification or simulation) and purposes (acceleration or operation). The underlying mathematical principles are presented and, furthermore, design considerations are given in this paper.

Enhancing Fault Tolerance of Radial Basis Functions

The challenge of future nanoelectronic applications, e.g. in quantum computing or in molecular computing, is to assure reliable computation facing a growing number of malfunctioning and failing computational units. Modeled on biology artificial neural networks are intended to be one preferred architecture for these applications because their architectures allow distributed information processing and, therefore, will result in tolerance to malfunctioning neurons and in robustness to noise. In this work, methods to enhance fault tolerance to permanently failing neurons of Radial Basis Function networks are investigated for function approximation applications. Therefore, a relevance measure is introduced which can be used to enhance the fault tolerance or, on the contrary, to control the network complexity if it is used for pruning.

Fault-tolerance of basis function networks using tensor product stabilizers

Neural networks are intended to be used in future nanoelectronics since these architectures seem to be fault-tolerant to malfunctioning elements and robust to noise. In this paper, the robustness to noise of basis function networks using tensor product stabilizers is analyzed and upper bounds of the mean square error under noise contaminated weights or inputs are determined. Furthermore, consequences of permanently malfunctioning neurons are investigated and their impact on the mean squared error is analyzed. To achieve a reliable operation of the neural network necessary restrictions are introduced. Finally, the impact of technical realizations is investigated and its complexity is compared to radial basis functions.

ADAPTABLE SWITCH BOXES AS ON-CHIP ROUTING NODES FOR NETWORKS-ON-CHIP

Due to continuous advancements in modern technology processes which have resulted in integrated circuits with smaller feature sizes and higher complexity, current system-on-chip designs consist of many different components such as memories, interfaces and microprocessors. To handle this growing number of components, an efficient communication structure must be provided and incorporated during system design. This work deals with the implementation of an efficient communication structure for an on-chip multiprocessor design. The internal structure of one node is proposed and specified by its requirements. Furthermore, different routing strategies are implemented. Moreover, the communication structure is mapped on a standard cell process to examine the achieved processing speed and to determine the area requirements.

Pareto-optimal noise and approximation properties of RBF networks

Neural networks are intended to be robust to noise and tolerant to failures in their architecture. Therefore, these systems are particularly interesting to be integrated in hardware and to be operating under noisy environment. In this work, measurements are introduced which can decrease the sensitivity of Radial Basis Function networks to noise without any degradation in their approximation capability. For this purpose, pareto-optimal solutions are determined for the parameters of the network.