Ramón J. Aliaga

Corrected position estimation in PET detector modules with multi-anode PMTs using neural networks

This paper studies the use of Neural Networks (NNs) for estimating the position of impinging photons in gamma ray detector modules for PET cameras based on continuous scintillators and Multi-Anode Photomultiplier Tubes (MA-PMTs). The detector under study is composed of a 49/spl times/49/spl times/10 mm/sup 3/ continuous slab of LSO coupled to a flat panel H8500 MA-PMT. Four digitized signals from a charge division circuit, which collects currents from the 8/spl times/8 anode matrix of the photomultiplier, are used as inputs to the NN, thus reducing drastically the number of electronic channels required. We have simulated the computation of the position for 511 keV gamma photons impacting perpendicularly to the detector surface. Thus, we have performed a thorough analysis of the NN architecture and training procedures in order to achieve the best results in terms of spatial resolution and bias correction. Results obtained using GEANT4 simulation toolkit show a resolution of 1.3 mm/1.9 mm FWHM at the center/edge of the detector and less than 1 mm of systematic error in the position near the edges of the scintillator. The results confirm that NNs can partially model and correct the non-uniform detector response using only the position-weighted signals from a simple 2D DPC circuit. Linearity degradation for oblique incidence is also investigated. Finally, the NN can be implemented in hardware for parallel real time corrected Line-of-Response (LOR) estimation. Results on resources occupancy and throughput in FPGA are presented.

A mixed hardware-software approach to flexible Artificial Neural Network training on FPGA

FPGAs offer a promising platform for the implementation of Artificial Neural Networks (ANNs) and their training, combining the use of custom optimized hardware with low cost and fast development time. However, purely hardware realizations tend to focus on throughput, resorting to restrictions on applicable network topology or low-precision data representation, whereas flexible solutions allowing a wide variation of network parameters and training algorithms are usually restricted to software implementations. This paper proposes a mixed approach, introducing a system-on-chip (SoC) implementation where computations are carried out by a high efficiency neural coprocessor with a large number of parallel processing elements. System flexibility is provided by on-chip software control and the use of floating-point arithmetic, and network parallelism is exploited through replicated logic and application-specific coprocessor architecture, leading to fast training time. Performance results and design limitations and trade-offs are discussed.

Accurate Simulation Testbench for Nuclear Imaging Systems

Current testbenches for nuclear imaging devices aim to simulate only a single stage of the system at a time. This approach is useful in early design stages where accuracy is not necessary. However, it would be desirable that different tools could be combined to achieve more detailed simulations. In this work, we present a high precision testbench that has been developed to test nuclear imaging systems. Its accuracy lies in the possibility of linking different simulation tools using the right one for each part of the system. High energy events are simulated using Geant4 (High Energy Simulator). Analog and digital electronics are verified using Cadence Spectre and ModelSim. This testbench structure allows testing any physical topology, scintillation crystals, photomultiplier tubes (PMTs), avalanche photodiodes (APDs), with any kind of ASIC, discrete analog and digital electronics, thus reducing the prototyping and design time. New system developments can be easily verified using behavioral and circuital description models for analog and digital electronics. Finally, a dual-head continuous LSO scintillation crystal positron emission tomography (PET) system has been used as an example for evaluation of the testbench.

Expandable programmable integrated front-end for scintillator based photodetectors

Scintillator based photodetectors tend to increase the number of output signals in order to improve spatial and energy resolutions. AMIC architecture was introduced in previous works as an alternative to traditional charge division front-ends. This novel architecture not only allowed to reduce the number of signals to be acquired but also provided more information about the light distribution on the photodetector surface. Another key feature of this new approach lies in its ability to manage any number of inputs, thus offering an expandable solution for photodetectors with a large number of output signals. The underlying idea in AMIC architecture is to calculate the moments of the detected light distribution in an analog fashion. Due to the additive nature of the moment calculation, the operation can be carried out on a single device or split it into several devices, adding the partial results afterwards. A new integrated front-end device AMIC2GR has been developed which improves several features of the original AMIC architecture. A new preamplifier configuration extends the maximum capacitive load thus allowing compatibility with many types of photomultipliers including SiPM without loss of performance. In order to test the expandability of AMIC architecture using the new AMIC2GR, a front end with 4 devices has been developed. Measurements with a 256-SiPM array were made. Furthermore, a new calibration method (Edna Calibration Method) to compensate gain and detector module differences was developed and tested. AMIC2GR allows to calibrate each SiPM individually to obtain better spatial resolution and homogeneity.

Incidence position estimation in a PET detector using a discretized positioning circuit and neural networks

The correct determination of the position of incident photons is a crucial issue in PET imaging. In this paper we study the use of Neural Networks (NNs) for position estimation of photons impinging on gamma-ray detector modules for PET cameras based on continuous scintillators and Multi-Anode Photomultiplier Tubes (MA-PMTs). We have performed a thorough analysis of the NN architecture and training procedures, using realistic simulated inputs, in order to achieve the best results in terms of spatial resolution and bias correction. The results confirm that NNs can partially model and correct the non-uniform detector response using only the position-weighted signals from a simple 2D Discretized Positioning Circuit (DPC). Linearity degradation for oblique incidence is also investigated. Finally, the NN can be implemented in hardware for parallel real time corrected Line-of-Response (LOR) estimation.

Experimental Platform for Accelerate the Training of ANNs with Genetic Algorithm and Embedded System on FPGA

When implementing an artificial neural networks (ANNs) will need to know the topology and initial weights of each synaptic connection. The calculation of both variables is much more expensive computationally. This paper presents a scalable experimental platform to accelerate the training of ANN, using genetic algorithms and embedded systems with hardware accelerators implemented in FPGA (Field Programmable Gate Array). Getting a 3x-4x acceleration compared with Intel Xeon Quad-Core 2.83 Ghz and 6x-7x compared to AMD Optetron Quad-Core 2354 2.2Ghz.

Evaluation of a timing integrated circuit architecture for continuous crystal and SiPM based PET systems

Improving timing resolution in positron emission tomography (PET), thus having fine time information of the detected pulses, is important to increase the reconstructed images signal to noise ratio (SNR) [1]. In the present work, an integrated circuit topology for time extraction of the incoming pulses is evaluated. An accurate simulation including the detector physics and the electronics with different configurations has been developed. The selected architecture is intended for a PET system based on a continuous scintillation crystal attached to a SiPM array. The integrated circuit extracts the time stamp from the first few photons generated when the gamma-ray interacts with the scintillator, thus obtaining the best time resolution. To get the time stamp from the detected pulses, a time to digital converter (TDC) array based architecture has been proposed as in [2] or [3]. The TDC input stage uses a current comparator to transform the analog signal into a digital signal. Individually configurable trigger levels allow us to avoid false triggers due to signal noise. Using a TDC per SiPM configuration results in a very area consuming integrated circuit. One solution to this problem is to join several SiPM outputs to one TDC. This reduces the number of TDCs but, on the other hand, the first photons will be more difficult to be detected. For this reason, it is important to simulate how the time resolution is degraded when the number of TDCs is reduced. Following this criteria, the best configuration will be selected considering the trade-off between achievable time resolution and the cost per chip. A simulation is presented that uses Geant4 for simulation of the physics process and, for the electronic blocks, spice and Matlab. The Geant4 stage simulates the gamma-ray interaction with the scintillator, the photon shower generation and the first stages of the SiPM. The electronics simulation includes an electrical model of the SiPM array and all the integrated circuitry that generates the time stamps. Time resolution results are analyzed using Matlab. The goal is to analyze the best resolution achievable with the SiPM and its degradation due to different circuitry configurations.

Evaluation of a modular PET system architecture with synchronization over data links

A DAQ architecture for a PET system is presented that focuses on modularity, scalability and reusability. The system defines two basic building blocks: data acquisitors and concentrators, which can be replicated in order to build a complete DAQ of variable size. Acquisition modules contain a scintillating crystal and either a position-sensitive photomultiplier (PSPMT) or an array of silicon photomultipliers (SiPM). The detector signals are processed by AMIC, an integrated analog front-end that generates programmable analog outputs which contain the first few statistical moments of the light distribution in the scintillator. These signals are digitized at 156.25 Msamples/s with free-running ADCs and sent to an FPGA which detects single gamma events, extracts position and time information online using digital algorithms, and submits these data to a concentrator module. Concentrator modules collect single events from acquisition modules and perform coincidence detection and data aggregation. A synchronization scheme over data links is implemented that calibrates each links latency independently, ensuring that there are no limitations on module mobility, and that the architecture is arbitrarily scalable. Prototype boards with both acquisition and concentration functionality have been built for evaluation purposes. The performance of a small PET system with two detectors based on continuous scintillators is presented. A synchronization error below 50 ps rms is measured, and energy resolutions of 19% and 24% and timing resolutions of 2.0 ns and 4.7 ns FWHM are obtained for PMT and SiPM photodetectors, respectively.

Programmable integrated front-end for SiPM/PMT PET detectors with continuous scintillating crystal

AMIC architecture has been introduced in previous works in order to provide a generic and expandable solution for implementing large number of outputs SiPM array/PMT detectors. The underlying idea in AMIC architecture is to calculate the moments of the detected light distribution in an analog fashion. These moments provide information about energy, x/y position, etc. of the light distribution of the detected event. Moreover this means that a small set of signals contains most of the information of the event, thus reducing the number of channels to be acquired.This paper introduces a new front-end device AMIC2GR which implements the AMIC architecture improving the features of the former integrated devices. Higher bandwidth and filtering coefficient precision along with a lower noise allow to apply some detector enhancements. Inhomogeneity among detector elements throughout the array can be reduced. Depth of interaction measurements can be obtained from the light distribution analysis. Also a common trigger signal can be obtained for the whole detector array. Finally AMIC2GR preamplifier stage close to SiPM output signals optimizes signal to noise ratio, which allows to reduce SiPM gain by using lower operating voltages thus reducing dark noise.

Real-Time Estimation of Zero Crossings of Sampled Signals for Timing Using Cubic Spline Interpolation

A scheme is proposed for hardware estimation of the location of zero crossings of sampled signals with subsample resolution for timing applications, which consists of interpolating the signal with a cubic spline near the zero crossing and then finding the root of the resulting polynomial. An iterative algorithm based on the bisection method is presented that obtains one bit of the result per step and admits an efficient digital implementation using fixed-point representation. In particular, the root estimation iteration involves only two additions, and the initial values can be obtained from finite impulse response (FIR) filters with certain symmetry properties. It is shown that this allows online real-time estimation of timestamps in free-running sampling detector systems with improved accuracy with respect to the more common linear interpolation. The method is evaluated with simulations using ideal and real timing signals, and estimates are given for the resource usage and speed of its implementation.