Rashad Ramzan

A 1.4V 25mW Inductorless Wideband LNA in 0.13/spl mu/m CMOS

A 1.4V wideband inductorless LNA, implemented in a 0.13mum CMOS process, consumes 25mW and occupies 0.019mm2. Measurement results show 17dB voltage gain, 7GHz BW, 2.4dB NF at 3GHz, -4.1 dBm IIP3, and -20dBm P1dB. A common-drain feedback circuit provides wideband 50Omega input matching and partial noise cancellation. A current reuse technique improves both gain and power.

Built-in Loopback Test for IC RF Transceivers

The essentials of the on-chip loopback test for integrated RF transceivers are presented. The available on-chip baseband processor serves as a tester while the RF front-end is under test enabled by on-chip test attenuator and in some cases by an offset mixer, too. Various system-level tests, like bit error rate, error vector magnitude, or spectral measurements are discussed. By using this technique in mass production, the RF test equipment can be largely avoided and the test cost reduced. Different variants of the loopback setup including the bypassing technique and RF detectors to boost the chip testability are considered. The existing limitations and tradeoffs are discussed in terms of test feasibility, controllability, and observability versus the chip performance. The fault-oriented approach supported by sensitization technique is put in contrast to the functional test. Also the impact of production tolerances is addressed in terms of a simple statistical model and the detectability thresholds. This paper is based on the present and previous work of the authors, largely revised and upgraded to provide a comprehensive description of the on-chip loopback test. Simulation examples of practical communication transceivers such as WLAN and EDGE under test are also included.

CMOS RF/DC Voltage Detector for on-Chip Test

In this paper we present a framework for RF testing of a radio front-end using CMOS RF/DC voltage detectors connected between RF nodes and a DC test bus. The detector is designed and implemented in 0.13mum CMOS process and it achieves high input impedance, low power, small area and wide dynamic range. Measurement results show that internal RF nodes can be accessed without significantly degrading the chip performance. A verification procedure using an extra DC bus is proposed to verify that due to process variations all detectors are within an acceptable performance limit.

Offset Loopback Test For IC RF Transceivers

In this paper we develop an offset loopback test setup for integrated RF transceivers (TRxs). Basically, addressed are architectures, which are not suitable for direct loopback test such as FDD transceivers or TDD transceivers where the transmitter (Tx) and receiver (Rx) share one frequency synthesizer (called VCO modulating TRxs). The technique makes use of an extra mixer put on chip to compensate for the incompatibility of the Tx and Rx, i.e. to compensate for a difference between the transmit- and the receive frequency, and/or to introduce a baseband signal needed for test. We discuss the problem in terms of system-level models, which are implemented and verified in Matlabtrade

LNA design for on-chip RF test

In this paper we present two CMOS LNA blocks designed for integration with other RF frontend blocks for on-chip test. Both of them are variants of the source degenerated LNA with embedded switches and/or a multiplexer, optimized with respect to their function and location. We discuss their functionality and performances in terms of test mode and the normal operation mode. The circuits are designed for 0.35mum CMOS process. Simulation results obtained at 2.4 GHz frequency, show a tradeoff between performance and testability. Nevertheless, the LNA circuit, which only uses embedded switches, proves a satisfactory design

Using evolutionary algorithms for ECG Arrhythmia detection and classification

The electrocardiogram (ECG) is the most clinically accepted diagnostic tool used by physicians for interpreting the functional activity of the heart. The existing ECG machines require an expert-in-the-loop for identifying abnormalities in cardiac activity - commonly referred to as Arrhythmia - of a patient. The accuracy of diagnosis is directly dependent on the skill set of the physician; as a result, in rural and remote places, where no ECG specialist wants to relocate, the patients are unable to get any help in case of life threatening arrhythmias. In this paper, we investigate the suitability of evolutionary algorithms to discriminate a normal ECG from an abnormal one with minimum user intervention. Consequently, the human dependent errors are minimized. The intelligent framework is efficient and can be used for realtime ECG analysis to complement the diagnostic efficiency and accuracy of ECG specialists. Moreover, the system could also be used to raise early alarms for patients where no ECG specialist is available. In this paper, we aim at autonomously detecting six types of Arrhythmia: (1) Tachycardia, (2) Bradycardia, (3) Right Bundle Branch Block, (4) Left Bundle Branch Block, (5) Old Inferior Myocardial Infarction, and (6) Old Anterior Myocardial Infarction. We evaluate the accuracy of our system by selecting the best back end classifier from a set of 8 evolutionary classifiers. The results of our experiments show that our system is able to achieve more than 98% accuracy in detecting most types of Arrhythmia.

On-chip calibration of RF detectors by DC stimuli and artificial neural networks

In the nanometer regime, especially the RF and analog circuits exhibit wide parameter variability, and consequently every chip produced needs to be tested. On-chip design for testability (DfT) features, which are meant to reduce test time and cost also suffer from parameter variability. Therefore, RF calibration of all on-chip test structures is mandatory. In this paper, artificial neural networks (ANN) are employed as multivariate regression technique to architect a general RF calibration scheme using DC- instead of RF stimuli. This relaxes the routing requirements on a chip for GHz test signals along with the reduction in test time and cost. The RF detector, a key element of a radio front-end DfT circuitry, designed in 65 nm CMOS is used to demonstrate the calibration scheme.

Figure of merit for narrowband, wideband and multiband LNAs

In software defined radio, the same radio front end is used to accommodate different wireless standards operating in different frequency bands. The use of wideband or multiband low noise amplifiers (LNAs) is mandatory in such situations. There are several figures of merit (FoMs) proposed for narrowband LNAs. These FoMs are modified for wideband/multiband LNAs just by the inclusion of 3 dB bandwidth, and designers tend to use the one that favours their own design. In this article, a review of the existing FoMs for narrowband LNAs is presented. Based on this analysis, we propose two different FoMs for fair comparison of improvement in LNA parameters due to complementary metal oxide semiconductor (CMOS) technology advancement and circuit optimisation (irrespective of transistor technology), separately. The empirical technology scaling factor for gain, noise figure (NF), f T and linearity is used to differentiate between these FoMs for different types of LNAs.

Fano resonance based ultra high-contrast electromagnetic switch

We experimentally achieve highly asymmetrical enhanced-Q Fano resonances in metallic electromagnetic structures fabricated on conductive planes. We show that the complete destructive interference mechanism of the dark and bright resonant modes generated by a pair of electromagnetically coupled open-ended conductive arms can lead to the asymmetric resonance characterized by a near-unity transparency window followed by a deep scattering band. With the incorporation of a variable capacitor between the coupled metallic strips, the dynamic tunability of the resonant modes is achieved, which can be exploited in high isolation switches and modulators in the GHz spectrum. The switching contrast of over 50 dB achieved through Fano resonance is much higher considering its compact size (i.e., the transmission path is much smaller than the wavelength λ / 30). The dispersion based tunable Fano switch offers several advantages over conventional microelectromechanical system and CMOS based switches.

2.4GHz WLAN RF energy harvester for passive indoor sensor nodes

This paper presents the design and measurement results of an RF Energy Harvester aimed to power sensor nodes like temperature, humidity, chemical, or radiation in an indoor industrial or residential environment. The harvester operates at 2.42 GHz WiFi-WLAN frequency band. It consists of multiple microstrip patch antennas, power combiner, voltage quadruple Greinacher rectifier circuit, and a super capacitor to store the harvested energy. All elements are designed using low-loss Rogers RO3206 substrate. The impedance matching of the power combiner with a rectifier is a non-trivial issue due to change in diode impedance with the input power. The peak efficiency is measured to be 57.8% at 6 to 8dBm input power. In the presence of realistic -10dBm continuous signal, the system can charge a 33mF super capacitor to 1.6V in 20 minutes. This collected energy is enough to power 10mW sensor node for a period of more than 4 seconds to perform wake up, sense and transmit functions, and put a sensor back to sleep mode.