Raul Blecic

New methodology on electro-thermal characterization and modeling of large power drivers using lateral PNP BJTs

This paper presents a new methodology to characterize and simulate the electro-thermal aspects of packaged power drivers using lateral bipolars. Maximum elevation of junction temperature due to the electrical power stress is sensed in the field of the drivers. Those measurements are further complemented by the transient interferometric mapping (TIM) inspection. For the first time a data driven segmented electro-thermal model is proposed to describe accurately the non-uniform current density and the thermal profile behavior of a large power driver.

SPICE analysis of RL and RC snubber circuits for synchronous buck DC-DC converters

Operation of a 1.3-MHz, 12-to-1.2 V, 20-A synchronous buck converter is analyzed by SPICE simulations. Special attention is given to two resonances formed by the capacitance of FETs in the off-state and the total inductance of the input decoupling network. The resonances are the main source of the broadband electromagnetic (EM) interference. Two most common circuit level methods for reducing the EM interference, an RL snubber circuit and an RC snubber circuit, are analyzed and compared in terms of their impact on the radiation characteristics, efficiency and reliability of the analyzed synchronous buck converter.

Electro-thermal characterization and simulation of integrated multi-trenched XtreMOSTM power devices

This paper presents a new methodology to characterize and simulate the electro-thermal aspects of packaged power drivers using multi-trenched XtreMOS devices. Electrical device data is collected by pulsed and DC measurements. Thermal data is collected through on-chip sensors -and through a full surface high resolution transient interferometric mapping (TIM). For the first time a data driven segmented electro-thermal transient model is proposed to describe accurately the thermal profile behavior for the mutli-trenched devices. Further investigations of the thermal heating impact on the driver due to the low thermal conductivity of the trenches (SiO2) have been carried out.

Radiation of input decoupling network typically used in switching DC-DC converters

Radiation characteristics of an input decoupling network for switching DC-DC converters are analyzed by a set of electromagnetic (EM) simulations. Input decoupling network is a part of a DC-DC converter with a dominant contribution to its radiated emissions. The impact of geometrical parameters of an input decoupling network such as the dimensions of metal plates on a printed circuit board (PCB), thickness of a PCB, number of layers, number of vias and radius of vias on the maximum radiated fields is analyzed. Design guidelines for minimizing radiated emissions of an input decoupling network for switching DC-DC converters are summarized.

Programmable digital IC for sub-nanoseconc dead-time adjustment used in synchronous switching DC-DC converters

A digital integrated circuit for sub-nanosecond dead-time adjustment is designed and its operation principle is described. The designed dead-time adjustment circuit (DTAC) generates two complementary control signals for the FET switches used in synchronous switching DC-DC converters. The control signals are generated from a PWM signal that is provided at the input of the DTAC. The circuit is based on a tapped delay-chain architecture and it is designed for the switching frequencies up to 10 MHz. The DTAC is designed in a 0.18-μm CMOS process. The impact of the process variations, ambient temperature and supply voltage on the achievable time-delay is investigated by the post-layout simulations. Additionally, the on-chip digital ‘slave’ circuit for serial communication is designed to allow programmability of the DTAC.

Minimization of maximum electric field in high-voltage parallel-plate capacitor

Minimization of maximum electric field of a parallel-plate capacitor for high-voltage and temperature stable applications is presented. Cubic zirconia is used as a dielectric material because of its high relative permittivity, high dielectric strength and high temperature stability. The maximum electric field present in the structure limits the maximum achievable capacitance of the capacitor structure. Reducing the maximum electric field of the capacitor allows to reduce the thickness of the dielectric material, which increases its capacitance. The impact of geometrical and electrical parameters of the parallel-plate capacitor on the maximum electric field is analyzed by a 2D multiphysics solver. The guidelines for the minimization of the maximum electric field are given.

3D EM simulations and analysis of in-package metal plate interconnecting high-side and low-side FETs of DC-DC converter

The impact of the metal plate that interconnects the high-side and low-side FETs on the behavior of a synchronous buck converter is analyzed. A 3D model of the integrated voltage regulator and PCB power planes is analyzed in electromagnetic (EM) simulator. The lumped-element model of the plate is extracted. Parametrization of the package and PCB geometry is performed to describe their influence on the plate parasitics. The operation of the converter using the integrated voltage regulator is evaluated by SPICE simulations for several sets of plate parameters to correctly estimate their influence on the resonant frequency and efficiency of the converter.

Design and characterization of a step-down switched-mode power converter based on the regulator MC34063A

This paper presents the winning design of the 2015 Student EMC Hardware Design Competition at the EMC 2015, Joint IEEE International Symposium on Electromagnetic Compatibility and EMC Europe. A step-down switched-mode power converter based on the regulator MC34063A is designed. Special attention is given to the minimization of its conducted emissions and output voltage ripple. The selection of the components and the design of the printed circuit board (PCB) layout are discussed. The output voltage ripple and conducted emissions of the designed converter are measured. A line impedance stabilization network (LISN) designed on a separate PCB is used for the conducted emission measurements.