Ray D. Sundstrom

A low power differential bus utilizing novel split level bus technique

A low-power differential bus utilizing a novel split level bus (SLB) technique is described. There are several inherent advantages with the SLB. The bus operates at full differential mode at all times so the receiver never detects an indeterminate state. There are no reference levels on the bus, allowing full common mode range. Making D and DB both passive or active at the same time can make the SLB appear similar to single-ended operation. This makes any present single-ended bus technique, such as future-bus arbitration, directly applicable to the SLB. The reduced power dissipated by the internal circuitry, and reduction in power supply pins, allow wider parts in the same package. The losses on the bus are reduced and the bus power remains constant for any number of drivers.<<ETX>>

Receiver Logic and Drive Circuitry

Publisher Summary This chapter provides an overview of receiver logic and drive circuitry. In data communications applications, the data and address information is supplied through parallel lines. The parallel information can be directly converted, line for line, into parallel optical signals, etc. Alternatively, the parallel information can first be converted into a serial bit stream and then transmitted through a serial optical link. The circuitry associated with these systems is implemented in various semiconductor technologies, including GaAs, silicon bipolar, complementary metal oxide semiconductor (CMOS), and BiCMOS. The high mobility associated with GaAs facilitates the meeting of high-frequency requirements of any circuit in the system. In driver circuitry, the optical driver can vary from a simple switch to a complicated feedback system accounting for many variables. The simple driver consists of a CMOS or transistor-transistor logic (TTL) output tied to a resistor, and an LED or laser diode. The optical receiver design can be virtually an art. The challenge involves tradeoffs in improving some parameters at the expense of other parameters. Along with all this, the chapter also comprises a brief review of linear and limiting receivers.

Chapter 4 – Logic and Drive Circuitry

The data and address information in data communications applications is generally supplied through parallel lines. The parallel information can then be directly converted, line-for-line, into parallel optical signals. It is noted that the parallel information can first be converted into a serial bit stream and then transmitted through a serial optical link. In the parallel optoelectrical interface, each parallel electrical line has a laser driver and laser associated with it. The light from each channel is guided to a photo detector, and the signal from each photo detector is amplified through a transimpedance and postamplifier, one for each channel. The array of postamplifiers, including conversion to appropriate digital signal levels, thus provides a parallel electrical output similar to the parallel electrical lines that were the original inputs. In the serial optical-electrical interface, the parallel electrical lines are multiplexed to provide a serial signal output. The circuitry associated with optical fiber systems can be implemented in various semiconductor technologies, including GaAs, silicon bipolar, complementary metal oxide semiconductor (CMOS), and BiCMOS. This chapter illustrates logic and drive circuitry in detail.