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Dive into the research topics where Reiko Hayami is active.

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Featured researches published by Reiko Hayami.


international electron devices meeting | 2000

A 0.2-/spl mu/m 180-GHz-f/sub max/ 6.7-ps-ECL SOI/HRS self aligned SEG SiGe HBT/CMOS technology for microwave and high-speed digital applications

Katsuyoshi Washio; Eiji Ohue; Hiromi Shimamoto; Katsuya Oda; Reiko Hayami; Yukihiro Kiyota; Masamichi Tanabe; Masao Kondo; Takashi Hashimoto; T. Harada

A technology for combining 0.2-/spl mu/m self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistors (HBTs) with CMOS transistors and high-quality passive elements has been developed for use in microwave wireless and optical communication systems. The technology has been applied to fabricate devices on a 200-mm SOI wafer based on a high-resistivity substrate (SOI/HRS). The fabrication process is almost completely compatible with the existing 0.2-/spl mu/m bipolar-CMOS process because of the essential similarity of the two processes. SiGe HBTs with shallow-trench isolations (STIs) and deep-trench isolations (DTIs) and Ti-salicide electrodes exhibited high-frequency and high-speed capabilities with an f/sub max/ of 180 GHz and an ECL-gate delay of 6.7 ps, along with good controllability and reliability and high yield. A high-breakdown-voltage HBT that could produce large output swings for the interface circuit was successfully added. CMOS devices (with gate lengths of 0.25 /spl mu/m for nMOS and 0.3 /spl mu/m for pMOS) exhibited excellent subthreshold slopes. Poly-Si resistors with a quasi-layer-by-layer structure had a low temperature coefficient. Varactors were constructed from the collector-base junctions of the SiGe HBTs. MIM capacitors were formed between the first and second metal layers by using plasma SiO/sub 2/ as an insulator. High-Q octagonal spiral inductors were fabricated by using a 3-/spl mu/m thick fourth metal layer.


bipolar/bicmos circuits and technology meeting | 1998

A 7.7-ps CML using selective-epitaxial SiGe HBTs

Eiji Ohue; Katsuya Oda; Reiko Hayami; Katsuyoshi Washio

The fastest CML gate delay to date (7.7 ps) was achieved. This CML gate uses a fully-self-aligned SiGe-base HBT (with a 92 GHz cutoff frequency and a 108 GHz maximum oscillation frequency) with a selectively-implanted collector through the base.


international electron devices meeting | 1999

A 0.2-/spl mu/m self-aligned SiGe HBT featuring 107-GHz f/sub max/ and 6.7-ps ECL

Masao Kondo; Eiji Ohue; Katsuya Oda; Reiko Hayami; Masamichi Tanabe; Hiromi Shimamoto; T. Harada

A 0.2-/spl mu/m self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistor (HBT), with shallow-trench and dual-deep-trench isolations and Ti-salicide electrodes, was developed. The process, except the SEG, is almost completely compatible with well-established BiCMOS technology. The SiGe HBTs exhibited a peak maximum oscillation frequency of 107 GHz and an ECL gate delay time of 6.7 ps. Four-level interconnects, including MIM-capacitors and high-Q inductors, were formed by chemical mechanical polishing.


international electron devices meeting | 2002

Ultra-high-speed scaled-down self-aligned SEG SiGe HBTs

Katsuyoshi Washio; Eiji Ohue; Reiko Hayami; A. Kodama; Hiromi Shimamoto; M. Miura; Katsuya Oda; I. Suzumura; Tatsuya Tominari; Takashi Hashimoto

A self-aligned selective-epitaxial-growth (SEG) SiGe HBT with a funnel-shape emitter electrode, which is structurally optimized for an emitter being scaled-down towards 100 nm, was developed. This SiGe HBT has an ECL gate delay of 4.9 ps, and implemented in an ultra-high-speed static frequency divider, produces a maximum operating frequency of 81 GHz.


bipolar/bicmos circuits and technology meeting | 2001

5.3-ps ECL and 71-GHz static frequency divider in self-aligned SEG SiGe HBT

Eiji Ohue; Reiko Hayami; Katsuya Oda; Hiromi Shimamoto; Katsuyoshi Washio

An ECL gate with a delay time of 5.3 ps, the fastest yet reported for semiconductor technology, and based on a self-aligned SiGe HBT with an optimized SEG structure was developed. Maximum operating frequency of static frequency divider using this structure is up to 71 GHz.


IEEE Transactions on Electron Devices | 2002

HCl-free selective epitaxial Si-Ge growth by LPCVD for high-frequency HBTs

Yukihiro Kiyota; Tsutomu Udo; Takashi Hashimoto; Akihiro Kodama; Hiromi Shimamoto; Reiko Hayami; Eiji Ohue; Katsuyoshi Washio

Low-temperature HCl-free selective silicon germanium epitaxial growth using low-pressure chemical vapor deposition was developed. By utilizing the incubation period of the poly-SiGe growth on SiO/sub 2/, sufficient selectivity was obtained without the use of HCl gas. The advantages of this HCl-free process are sufficient growth rate at low temperature (660/spl deg/C) and capability of high-concentration boron doping without surface roughening. The thickness uniformity of the selectively grown layers throughout a wafer was good and the local loading effect did not appear. These results show the process can be used for fabricating heterojunction bipolar transistors (HBTs). The HBTs fabricated using the process have excellent yields and high-frequency characteristics, that is, 80-GHz cutoff frequency and 160-GHz maximum oscillation frequency. These characteristics and good uniformity of cutoff frequency throughout a wafer show that developed selective growth process can be applied to production of SiGe HBTs.


IEEE Transactions on Electron Devices | 2002

Optimization of characteristics related to the emitter-base junction in self-aligned SEG SiGe HBTs and their application in 72-GHz-static/92-GHz-dynamic frequency dividers

Katsuyoshi Washio; Eiji Ohue; Katsuya Oda; Reiko Hayami; Masamichi Tanabe; Hiromi Shimamoto

Characteristics related to the emitter-base junction of self-aligned selective-epitaxial-growth SiGe heterojunction bipolar transistors (HBTs) were optimized for use with a highly-doped base. The thickness of the Si-cap layer affected both the emitter-base junction concentration and space-charge width, so the dc and ac characteristics of the SiGe HBTs were in turn dependent on this thickness. With a 4/spl times/10/sup 19/-cm/sup -3/ boron-doped base, a 131-GHz cutoff frequency and ECL gate-delay time of 5.4 ps were achieved for the optimized SiGe HBTs. A static frequency divider with a maximum operating frequency of 72.2 GHz and a dynamic frequency divider with a maximum operating frequency of 92.4 GHz were developed for optical-fiber link and millimeter-wave communication systems of the future.


IEEE Transactions on Electron Devices | 2001

A 0.2-/spl mu/m self-aligned selective-epitaxial-growth SiGe HBT featuring 107-GHz f/sub max/ and 6.7-ps ECL

Katsuyoshi Washio; Masao Kondo; Eiji Ohue; Katsuya Oda; Reiko Hayami; Masamichi Tanabe; H. Shimamto; T. Harada

A 0.2-/spl mu/m self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistor (HBT), with shallow-trench and dual-deep-trench isolations and Ti-salicide electrodes, has been developed. The 0.6-/spl mu/m-wide Si-cap/SiGe-base multilayer was selectively grown by UHV/CVD. The process, except the SEG, is almost completely compatible with well-established bipolar-CMOS technology and the SiGe HBTs were fabricated on a 200-mm wafer line. The SiGe HBTs have demonstrated a peak cutoff frequency of 90 GHz, a peak maximum oscillation frequency of 107 GHz, and an ECL gate delay time of 6.7 ps. Four-level interconnects, including MIM capacitors and high-Q inductors, were formed by chemical mechanical polishing.


IEEE Transactions on Electron Devices | 2003

High-speed scaled-down self-aligned SEG SiGe HBTs

Katsuyoshi Washio; Eiji Ohue; Reiko Hayami; Akihiro Kodama; Hiromi Shimamoto; Makoto Miura; Katsuya Oda; Isao Suzumura; Tatsuya Tominari; Takashi Hashimoto

A scaled-down self-aligned selective-epitaxial-growth (SEG) SiGe HBT, structurally optimized for an emitter scaled down toward 100 nm, was developed. This SiGe HBT features a funnel-shaped emitter electrode and a narrow separation between the emitter and base electrodes. The first feature is effective for suppressing the increase of the emitter resistance, while the second one reduces the base resistance of the scaled-down emitter. The good current-voltage performance - a current gain of 500 for the SiGe HBT with an emitter area of 0.11 /spl times/ 0.34 /spl mu/m and V/sub BE/ standard deviation of less than 0.8 mV for emitter width down to about 0.13 /spl mu/m - demonstrates the applicability of this SiGe HBT with a narrow emitter. This SiGe HBT demonstrated high-speed operation: an emitter-coupled logic (ECL) gate delay of 4.8 ps and a maximum operating frequency of 81 GHz for a static frequency divider.


IEEE Transactions on Electron Devices | 2006

Promoting emitter diffusion process and optimization of vertical profiles for high-speed SiGe HBT/BiCMOS

Makoto Miura; Hiromi Shimamoto; Reiko Hayami; Akihiro Kodama; Tatsuya Tominari; Takashi Hashimoto; Katsuyoshi Washio

A high-temperature anneal-resistant process, which enables high-speed SiGe HBTs to embed scaled CMOS, is optimized in SiGe BiCMOS technology. This process, called promoting emitter diffusion (PED), is based on enhanced phosphorous diffusion from poly-Si emitter electrodes at high temperature to fabricate thin base layers and shorten the base transit time. By investigating the dependence of high-frequency performance on diffusion temperature, as-grown base layer thickness, and Si cap thickness, the methodology for PED optimization was yielded. In addition, this PED process is effective in reducing an extrinsic base resistance due to deep boron diffusion from poly-Si base electrodes. This indicates that the PED process is very effective at improving the tradeoff relationship between cutoff frequency f/sub T/ and maximum oscillation frequency f/sub max/ in self-aligned SiGe HBTs using selective epitaxial growth. As a consequence, both f/sub T/ and f/sub max/ of more than 200GHz were successfully obtained.

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