Hiromi Shimamoto
Hitachi
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Featured researches published by Hiromi Shimamoto.
international electron devices meeting | 2000
Katsuyoshi Washio; Eiji Ohue; Hiromi Shimamoto; Katsuya Oda; Reiko Hayami; Yukihiro Kiyota; Masamichi Tanabe; Masao Kondo; Takashi Hashimoto; T. Harada
A technology for combining 0.2-/spl mu/m self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistors (HBTs) with CMOS transistors and high-quality passive elements has been developed for use in microwave wireless and optical communication systems. The technology has been applied to fabricate devices on a 200-mm SOI wafer based on a high-resistivity substrate (SOI/HRS). The fabrication process is almost completely compatible with the existing 0.2-/spl mu/m bipolar-CMOS process because of the essential similarity of the two processes. SiGe HBTs with shallow-trench isolations (STIs) and deep-trench isolations (DTIs) and Ti-salicide electrodes exhibited high-frequency and high-speed capabilities with an f/sub max/ of 180 GHz and an ECL-gate delay of 6.7 ps, along with good controllability and reliability and high yield. A high-breakdown-voltage HBT that could produce large output swings for the interface circuit was successfully added. CMOS devices (with gate lengths of 0.25 /spl mu/m for nMOS and 0.3 /spl mu/m for pMOS) exhibited excellent subthreshold slopes. Poly-Si resistors with a quasi-layer-by-layer structure had a low temperature coefficient. Varactors were constructed from the collector-base junctions of the SiGe HBTs. MIM capacitors were formed between the first and second metal layers by using plasma SiO/sub 2/ as an insulator. High-Q octagonal spiral inductors were fabricated by using a 3-/spl mu/m thick fourth metal layer.
international electron devices meeting | 1997
Katsuyoshi Washio; Eiji Ohue; Masamichi Tanabe; Hiromi Shimamoto; Takahiro Onai
A selective-epitaxial SiGe base heterojunction bipolar transistor (HBT) with self-aligned stacked metal/IDP (SMI) electrodes is proposed. The SiGe-base structure, self-aligned to the 0.1-/spl mu/m-wide emitter, effectively reduces collector capacitance and SMI electrodes provide low parasitic resistances. A BPSG/SiO/sub 2/-refilled trench was introduced to reduce the substrate capacitance. A 9.3-ps delay time in a differential ECL ring oscillator was achieved.
international electron devices meeting | 2003
Takashi Hashimoto; Yusuke Nonaka; Tatsuya Tominari; H. Fujiwara; K. Tokunaga; M. Arai; S. Wada; T. Udo; M. Seto; M. Miura; Hiromi Shimamoto; Katsuyoshi Washio; H. Tomioka
200 GHz f/sub T/ SiGe HBTs and 80 nm gate CMOS were successfully integrated using the LP-CVD technique for selective SiGe epitaxial growth. Suppressing base resistance enabled us to achieve f/sub MAX/ of 227 GHz, corresponding to f/sub T/ of 201 GHz. Shrunk HBTs of A/sub E/=0.15/spl times/0.7 /spl mu/m/sup 2/ achieved ECL ring oscillator gate delay of 5.3 ps at Ics=1.2 mA. Self-heating effects on junction temperature and device performance were investigated with an emitter-width scaling effect. A low thermal budget HBT process sustains full compatibility with 0.13 /spl mu/m platforms for large scaled RF ICs.
international solid-state circuits conference | 2000
Toru Masuda; K. Ohhata; Fumihiko Arakawa; Nobuhiro Shiramizu; Eiji Ohue; Katsuya Oda; R. Hayami; Masamichi Tanabe; Hiromi Shimamoto; M. Kondo; Takashi Harada; Katsuyoshi Washio
A preamplifier with 45 GHz bandwidth and 50.2 dB/spl Omega/ transimpedance gain, a limiting amplifier with 32 dB gain and 49 GHz bandwidth, and a 40 Gb/s 1:4 high-sensitivity demultiplexer (HS-DEMUX) combined with a decision circuit are for use in a 40 Gb/s optical receiver. The bandwidth in the preamplifier and the maximum gain at 40 GHz in the limiting amplifier are the best reported for any semiconductor technology. The 1:4 HS-DEMUX uses bit-rotation for byte-synchronization.
international solid-state circuits conference | 2000
Katsuyoshi Washio; Eiji Ohue; Katsuya Oda; R. Hayami; Masamichi Tanabe; Hiromi Shimamoto; Takashi Harada; M. Kondo
A dynamic frequency divider with 82.4 GHz maximum operating frequency, the fastest reported in any semiconductor technology, and a static frequency divider with 60 GHz maximum operating frequency, the fastest reported in Si, are intended for future millimeter-wave systems. These frequency dividers are fabricated in self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistors (HBTs). These SiGe HBTs provide a 122 GHz cutoff frequency, a 163 GHz maximum oscillation frequency, and 5.5 ps ECL gate delay, the fastest reported in Si.
IEEE Transactions on Electron Devices | 1998
Masao Kondo; Katsuya Oda; Eiji Ohue; Hiromi Shimamoto; Masamichi Tanabe; Takahiro Onai; Katsuyoshi Washio
Ultra-low-power and high-speed SiGe base bipolar transistors that can be used in RF sections of multi-GHz telecommunication systems have been developed. The SiGe base and a poly-Si/SiGe base-contact were formed by selective growth in a self-aligned manner. The transistors have a very small base-collector capacitance (below 1 fF for an emitter area of 0.2/spl times/0.7 /spl mu/m) and exhibit a high maximum oscillation frequency (30-70 GHz) at low current (5-100 /spl mu/A). The power-delay product of an ECL ring oscillator is only 5.1 fJ/gate for a 250-mV voltage swing. The maximum toggle frequency of a one-eighth static divider is 4.7 GHz at a switching current of 68 /spl mu/A/FF.
international solid-state circuits conference | 1998
Toru Masuda; K. Ohhata; Katsuya Oda; Masamichi Tanabe; Hiromi Shimamoto; Takahiro Onai; Katsuyoshi Washio
A preamplifier with 35 GHz bandwidth and 48.7 dB/spl Omega/ transimpedance gain, an automatic-gain-control (AGC) amplifier core with 31 GHz bandwidth, and a 40 Gb/s decision circuit are presented for future optical-transmission systems at a data rate of 40 Gb/s in global communication systems. A self-aligned selective-epitaxial SiGe-base heterojunction bipolar transistor is used to implement these circuits. This analog IC chipset meets the requirements for a 40 Gb/s optical receiver.
international electron devices meeting | 1999
Masao Kondo; Eiji Ohue; Katsuya Oda; Reiko Hayami; Masamichi Tanabe; Hiromi Shimamoto; T. Harada
A 0.2-/spl mu/m self-aligned selective-epitaxial-growth (SEG) SiGe heterojunction bipolar transistor (HBT), with shallow-trench and dual-deep-trench isolations and Ti-salicide electrodes, was developed. The process, except the SEG, is almost completely compatible with well-established BiCMOS technology. The SiGe HBTs exhibited a peak maximum oscillation frequency of 107 GHz and an ECL gate delay time of 6.7 ps. Four-level interconnects, including MIM-capacitors and high-Q inductors, were formed by chemical mechanical polishing.
international electron devices meeting | 2002
Katsuyoshi Washio; Eiji Ohue; Reiko Hayami; A. Kodama; Hiromi Shimamoto; M. Miura; Katsuya Oda; I. Suzumura; Tatsuya Tominari; Takashi Hashimoto
A self-aligned selective-epitaxial-growth (SEG) SiGe HBT with a funnel-shape emitter electrode, which is structurally optimized for an emitter being scaled-down towards 100 nm, was developed. This SiGe HBT has an ECL gate delay of 4.9 ps, and implemented in an ultra-high-speed static frequency divider, produces a maximum operating frequency of 81 GHz.
bipolar/bicmos circuits and technology meeting | 2001
Eiji Ohue; Reiko Hayami; Katsuya Oda; Hiromi Shimamoto; Katsuyoshi Washio
An ECL gate with a delay time of 5.3 ps, the fastest yet reported for semiconductor technology, and based on a self-aligned SiGe HBT with an optimized SEG structure was developed. Maximum operating frequency of static frequency divider using this structure is up to 71 GHz.