Ren Guanghui

Automatic digital modulation recognition using artificial neural networks

This paper presents a modified structure and learning algorithm of artificial neural networks (ANN) for recognizing baseband signal modulation types in the presence of additive white Gaussian noise. The new method employs a layer with less output nodes and an error back propagation learning algorithm with momentum to improve the recognition performance. Simulation results and performance evaluation of the ANN are given and it is shown that the benefits of the developed method are that its structure is simple and it performs well at low signal to noise ratio (SNR) with high overall success rates.

Channelized receiver platform of SDR based on FPGAs

In this paper, a channelized receiver platform of software defined radio is developed which is mainly to realize wideband quadrature digitization, modulation classification and demodulation exploiting A/D converters. FPGAs with the combination of programmable DSPs. The front-end of researched receiver based on polyphase filter quadrature digitization processors, where digitization takes place at intermediate frequencies (IF), adopts a wideband design with a bandwidth of up to 100MHz and a centered carrier frequency of up to 250MHz. The low-complexity high-speed digital IF signal processing is carried out with CORDIC algorithm on FPGAs, then to realize the recognition of several modulation schemes such as 2ASK, 4ASK, 2PSK, 4PSK, 2FSK, 4FSK, 16QAM to implement communication protocols fairly flexibly.In this paper, a channelized receiver platform of software defined radio is developed which is mainly to realize wideband quadrature digitization, modulation classification and demodulation exploiting A/D converters. FPGAs with the combination of programmable DSPs. The front-end of researched receiver based on polyphase filter quadrature digitization processors, where digitization takes place at intermediate frequencies (IF), adopts a wideband design with a bandwidth of up to 100MHz and a centered carrier frequency of up to 250MHz. The low-complexity high-speed digital IF signal processing is carried out with CORDIC algorithm on FPGAs, then to realize the recognition of several modulation schemes such as 2ASK, 4ASK, 2PSK, 4PSK, 2FSK, 4FSK, 16QAM to implement communication protocols fairly flexibly.

A new approach of 2D discrete cosine transform with Mobius inverse formula

The 2D discrete cosine transform (DCT) is an important mathematical tool in digital image processing and many other fields. Our aim is mainly to present an algorithm of 2D DCT, which turns N/spl times/N DCT into N separate 1D DCT and addition operations, and then to implement DCT with an arithmetic Fourier transform (AFT), which has turned out to be an important alternative to the known traditional methods of fast Fourier transform (FFT) in terms of accuracy, complexity and speed. The total number of multiplications and additions is only half of that required for the corresponding traditional method. Simulation results show that this method is feasible and its computational complexity is lower than the row-column algorithm.

A study on implementing wavelet transform and FFT with FPGA

This paper shows how to implement the wavelet transform and the Fast Fourier Transform (FFT) with a Field Programmed Gate Array (FPGA). First, it introduces the implementation of the wavelet transform with lattice filters and achieves the FFT with the Coordinate Rotational Digital Computation (CORDIC). Then, the emulation data of the Daubechies D4 & D6 wavelet transforms and the FFT with 16 points are given, and their performances are analyzed. The results prove this to be a novel and effective method to implement the wavelet transform and the FFT with FPGA.

A New CPFSK Telemetry Digital Polarization Diversity Receiver

A new continuous phase frequency-shifted keyed (CPFSK) telemetry digital polarization diversity receiver is studied. With compared to conventional telemetry analog polarization diversity receiver, the realization of it is simpler and it can provide more system flexibility, and stability. Polarization diversity structure of telemetry receiver proposed is given. A new method of removing Doppler frequency and carrier frequency deviation is provided and analyzed. Its performance is investigated over additive white Gaussian noise (AWGN). The simulation results show that the Doppler frequency shift and carrier frequency deviation can be removed by the method proposed in this paper

A research on adaptive digital filtering and digital demodulation based on software radio architecture

A new method of adaptive digital filtering and digital demodulation based on software radio architecture and used in the remote sensing system is proposed in this paper. Compared with the method once widely used, analog/digital phase lock loop, the new system, as all SWR systems, has three obvious characteristics: easily reconfigured, good flexibility, and modulation. The new method mentioned here makes the digital filtering and the digital demodulation processor of the SWR receiver recover useful signal perfectly. The signal can be immediately recovered on the first one-bit-level jump if the signal is under the state of unlocking without the synchronization building time of the normal DPLL. The new adaptive demodulation method based on SWR architecture can be widely used in almost every remote sensing systems

A research on adaptive PCM clock recovering

A new kind of digital adaptive bit synchronizer used in remote sensing systems is proposed in this paper. Compared with the method once widely used, the analog/digital phase lock loop, the new adaptive PCM bit synchronizer can obtain bit synchronization signal on condition that the frequency of the input digital signal is unknown. The phase can be immediately relocked on the first bit-level jump if the signal is under the state of unlocking without the synchronization building time of the normal DPLL. The adaptive bit synchronizer can be widely used in almost every remote sensing system.

On sampling-filtering digitization mechanism for high-speed wide band signals

This paper analyzes conversion errors of time sampling realized by sampling-hold or flash ADC, presents basic principles and implementation scheme of sampling-filter data acquisition technique for high-speed wide band signals, proves an important characteristic of Gauss filter and calculates digitization window width of Gauss filter output pulse.