Renato Coral Sampaio

Inverse Kinematics and Model Calibration Optimization of a Five-D.O.F. Robot for Repairing the Surface Profiles of Hydraulic Turbine Blades

This paper presents and discusses the results of an ongoing R&D project aiming to design and build a fully automated prototype of a specialized spherical robotic welding system for repairing hydraulic turbine surfaces eroded by cavitation pitting and/or cracks produced by cyclic loading. The system has an embedded vision sensor built to acquire range images by laser scanning over the blades surface and produce 3D models to locate the damaged spots to be registered in a 3D coordinate system into the robot controller, enabling the robot to repair the flaws automatically by welding in layers. The paper is focused on the robot kinematic model and describes an iterative algorithm to process the inverse kinematics with only five degrees-of-freedom. The algorithm makes use of data collected from a vision sensor to ensure that the welding gun axis is perpendicular to the blades surface. Besides this, it proposes a modelling and optimization mathematical routine for more efficient robot calibration, which can be used with any type of robot. This robot calibration optimization scheme finds the optimal error parameter vector based on the condition number of the manipulator transformation composed from the partial derivatives of the error parameters. Experimental results proved both the iterative algorithm to perform the inverse kinematics and the technique to optimize robot calibration to be very efficient.

A specialized robotic system prototype for repairing surface profiles of hydraulic turbine blades

This article presents the steps of an ongoing R&D project aiming at designing and constructing a prototype of a specialized welding robotic system for repairing the surface of hydraulic turbine blades eroded by cavitation pitting and/or cracked by cyclic loading, reducing human risks and increasing the efficiency of the process. The robotic system has a spherical topology with 5 d.o.f., electric stepper and DC servo motors. The system has an embedded vision sensor built to produce range images by scanning laser beams on the blade surface and to construct 3-D models to locate the damaged spots to be recorded into the robot controller in 3-D coordinates, enabling the robot to repair the flaws automatically by welding in layers. The robot prototype is at final stages to be fully operational, with some remaining procedures such as computer systems integration and calibration for final tests and commissioning.

Hardware and software co-design for the AAC audio decoder

This paper presents a HW/SW Co-design of an AAC-LC audio decoder implemented on an FPGA. The complexity of each decoding step is analyzed and the decoding modules are classified by their computational requirements. The result is a balanced design with software modules running on a processor used to implement the various types of AAC input formats (MP4 Standard files and LATM/LOAS Stream) as well as the bitstream parser. Hardware modules are used for the calculation intensive parts of the algorithm (Huffman Decoding, Spectral Tools, Filterbank). The integrated design is implemented on an Altera Cyclone II FPGA with NIOS II/s as a processor and was able to decode 5.1 (6 channels) audio wavefiles running at 50MHz while other FPGA designs seen on literature decode only 2 channels with half the frequency.

Sensor Fusion to Estimate the Depth and Width of the Weld Bead in Real Time in GMAW Processes

The arc welding process is widely used in industry but its automatic control is limited by the difficulty in measuring the weld bead geometry and closing the control loop on the arc, which has adverse environmental conditions. To address this problem, this work proposes a system to capture the welding variables and send stimuli to the Gas Metal Arc Welding (GMAW) conventional process with a constant voltage power source, which allows weld bead geometry estimation with an open-loop control. Dynamic models of depth and width estimators of the weld bead are implemented based on the fusion of thermographic data, welding current and welding voltage in a multilayer perceptron neural network. The estimators were trained and validated off-line with data from a novel algorithm developed to extract the features of the infrared image, a laser profilometer was implemented to measure the bead dimensions and an image processing algorithm that measures depth by making a longitudinal cut in the weld bead. These estimators are optimized for embedded devices and real-time processing and were implemented on a Field-Programmable Gate Array (FPGA) device. Experiments to collect data, train and validate the estimators are presented and discussed. The results show that the proposed method is useful in industrial and research environments.

Efficient hardware implementation of morphological reconstruction based on sequential reconstruction algorithm

This work presents a hardware implementation of the morphological reconstruction algorithm for biomedical images analysis. The morphological reconstruction algorithm is based on the Sequential Reconstruction (SR). In this case. a hardware architecture has been developed and implemented by mapping the SR algorithm into an Altera Cyclone IV E FPGA based platform. including a NIOS II processor. The developed architecture has been described in VHDL language. and it is scalable for image sizes from 96 × 96 pixels to 288 × 288 pixels using a neighboring element of 3 × 3. The quality evaluation of the yielded images was achieved by using SR-SIM (Spectral Residual Based Similarity) metric. which has also been used for visual verification of the images.

A SVM optimization tool and FPGA system architecture applied to NMPC

Support Vector Machines (SVMs) are supervised learning models of the machine learning field whose performance strongly depended on its hyperparameters. The Bio-inspired Optimization Tool for SVM (BIOTS) tool is based on a Multi-Objective Particle Swarm Algorithm (MOPSO) to tune hyperparameters of SVMs. In this work, BIOTS is proposed along with a custom hardware design generator (VHDL) that implements the SVM in a Field-Programmable Gate Array (FPGA). Both tools are combined to create an approximate Nonlinear Model Predictive Controller (NMPC) applied to a singlelink robotic arm. The result is a generated SVM implemented in a FPGA yielding better results in terms of speed and simplicity compared to our previous work that addressed the same problem with a Radial Basis Functions Neural Networks (RBFNN).

An FPGA-based controller design for a 5 d.o.f. robot for repairing hydraulic turbine blades

This paper presents the design of a FPGA-based embedded system for control and monitoring of a 5 d.o.f. spherical topology robot actuated by electric stepper and DC servo motors. The embedded robot controller has been developed using a hardware/software co-design approach in which a Terasic DE2-115 development kit, together with several hardware modules such as timer, JTAG, I/O, memory and RS-232, USB are connected via the Avalon bus. Additionally, several specific hardware modules have been designed in order to provide signals to the motor drivers and measure encoder signals. Also, a power-board has been designed to provide an opto-coupled connection to the first three motor drivers and their respective encoders. Finally, the control system also provides a RS-232 interface to the pan-tilt, which provides the last two degrees of freedom to the manipulator. The robot inverse kinematics was described in C language, running in the Nios II soft-processor, which receives spatial coordinate points from two processes running on a PC via an USB interface. These processes are responsible for processing the surface using specific image processing techniques based on a LASER sensor. Other process, running on a PC, generate the trajectories that the robot will follow during the welding task. The embedded software guarantees a suitable synchronization among all motors of the manipulator by using a Finite State Machine (FSM).

High-level design and synthesis of a MPEG-4 AAC IMDCT module

This paper presents an architectural design space exploration of the MPEG-4 AAC Inverse Modified Cosine Transform (IMDCT) starting from an algorithmic C++ description. Using a High-level Synthesis tool, several alternative solutions were generated with different results in terms of area and throughput. All designs have been synthesized and tested with FPGAs and the final architecture has shown similar resources utilization to the obtained with an RTL design, but requiring much less development time. We present a comparison of the costs for the two approaches regarding the silicon area, speed and required DSP resources.