Robert Colby

First experimental demonstration of gate-all-around III–V MOSFETs by top-down approach

The first inversion-mode gate-all-around (GAA) III–V MOSFETs are experimentally demonstrated with a high mobility In<inf>0.53</inf>Ga<inf>0.47</inf>As channel and atomic-layer-deposited (ALD) Al<inf>2</inf>O<inf>3</inf>/WN gate stacks by a top-down approach. A well-controlled InGaAs nanowire release process and a novel ALD high-k/metal gate process has been developed to enable the fabrication of III–V GAA MOSFETs. Well-behaved on-state and off-state performance has been achieved with channel length (L<inf>ch</inf>) down to 50nm. A detailed scaling metrics study (S.S., DIBL, V<inf>T</inf>) with L<inf>ch</inf> of 50nm – 110nm and fin width (W<inf>Fin</inf>) of 30nm – 50nm are carried out, showing the immunity to short channel effects with the advanced 3D structure. The GAA structure has provided a viable path towards ultimate scaling of III–V MOSFETs.

Dislocation filtering in GaN nanostructures.

Dislocation filtering in GaN by selective area growth through a nanoporous template is examined both by transmission electron microscopy and numerical modeling. These nanorods grow epitaxially from the (0001)-oriented GaN underlayer through the approximately 100 nm thick template and naturally terminate with hexagonal pyramid-shaped caps. It is demonstrated that for a certain window of geometric parameters a threading dislocation growing within a GaN nanorod is likely to be excluded by the strong image forces of the nearby free surfaces. Approximately 3000 nanorods were examined in cross-section, including growth through 50 and 80 nm diameter pores. The very few threading dislocations not filtered by the template turn toward a free surface within the nanorod, exiting less than 50 nm past the base of the template. The potential active region for light-emitting diode devices based on these nanorods would have been entirely free of threading dislocations for all samples examined. A greater than 2 orders of magnitude reduction in threading dislocation density can be surmised from a data set of this size. A finite element-based implementation of the eigenstrain model was employed to corroborate the experimentally observed data and examine a larger range of potential nanorod geometries, providing a simple map of the different regimes of dislocation filtering for this class of GaN nanorods. These results indicate that nanostructured semiconductor materials are effective at eliminating deleterious extended defects, as necessary to enhance the optoelectronic performance and device lifetimes compared to conventional planar heterostructures.

Large-scale graphitic thin films synthesized on Ni and transferred to insulators: Structural and electronic properties

We present a comprehensive study of the structural and electronic properties of ultrathin films containing graphene layers synthesized by chemical vapor deposition based surface segregation on polycrystalline Ni foils then transferred onto insulating SiO2/Si substrates. Films of size up to several mm’s have been synthesized. Structural characterizations by atomic force microscopy, scanning tunneling microscopy, cross-sectional transmission electron microscopy (XTEM), and Raman spectroscopy confirm that such large-scale graphitic thin films (GTF) contain both thick graphite regions and thin regions of few-layer graphene. The films also contain many wrinkles, with sharply-bent tips and dislocations revealed by XTEM, yielding insights on the growth and buckling processes of the GTF. Measurements on mm-scale back-gated transistor devices fabricated from the transferred GTF show ambipolar field effect with resistance modulation ∼50% and carrier mobilities reaching ∼2000 cm2/V s. We also demonstrate quantum tra...

Built-in Electric Field Minimization in (In, Ga)N Nanoheterostructures

(In, Ga)N nanostructures show great promise as the basis for next generation LED lighting technology, for they offer the possibility of directly converting electrical energy into light of any visible wavelength without the use of down-converting phosphors. In this paper, three-dimensional computation of the spatial distribution of the mechanical and electrical equilibrium in nanoheterostructures of arbitrary topologies is used to elucidate the complex interactions between geometry, epitaxial strain, remnant polarization, and piezoelectric and dielectric contributions to the self-induced internal electric fields. For a specific geometry-nanorods with pyramidal caps-we demonstrate that by tuning the quantum well to cladding layer thickness ratio, h(w)/h(c), a minimal built-in electric field can be experimentally realized and canceled, in the limit of h(w)/h(c) = 1.28, for large h(c) values.

GaN nanostructure design for optimal dislocation filtering

The effect of image forces in GaN pyramidal nanorod structures is investigated to develop dislocation-free light emitting diodes (LEDs). A model based on the eigenstrain method and nonlocal stress is developed to demonstrate that the pyramidal nanorod efficiently ejects dislocations out of the structure. Two possible regimes of filtering behavior are found: (1) cap-dominated and (2) base-dominated. The cap-dominated regime is shown to be the more effective filtering mechanism. Optimal ranges of fabrication parameters that favor a dislocation-free LED are predicted and corroborated by resorting to available experimental evidence. The filtering probability is summarized as a function of practical processing parameters: the nanorod radius and height. The results suggest an optimal nanorod geometry with a radius of ∼50b (26 nm) and a height of ∼125b (65 nm), in which b is the magnitude of the Burgers vector for the GaN system studied. A filtering probability of greater than 95% is predicted for the optimal ge...

Biotemplated synthesis of metallic nanoparticle chains on an alpha-synuclein fiber scaffold.

Biomolecular templates provide an excellent potential tool for bottom-up device fabrication. Self-assembling alpha-synuclein protein fibrils, the formation of which has been linked to Parkinsons disease, have yet to be explored for potential device fabrication. In this paper, alpha-synuclein fibrils were used as a template for palladium (Pd), gold (Au) and copper (Cu) nanoparticle chains synthesis. Deposition over a range of conditions resulted in metal-coated fibers with reproducible average diameters between 50 and 200 nm. Active elemental palladium deposited on the protein fibrils is used as a catalyst for the electroless deposition of Au and Cu. Nanoparticle chains were characterized by scanning electron microscopy (SEM), transmission electron microscopy (TEM), X-ray energy dispersive spectrometry (XEDS), and electron energy loss spectrometry (EELS).

Amorphous interface layer in thin graphite films grown on the carbon face of SiC

Cross-sectional transmission electron microscopy (TEM) is used to characterize an amorphous layer observed at the interface in graphite and graphene films grown via thermal decomposition of C-face 4H-SiC. The amorphous layer does not to cover the entire interface, but uniform contiguous regions span microns of cross-sectional interface. Annular dark field scanning transmission electron microscopy (ADF-STEM) images and electron energy loss spectroscopy (EELS) demonstrate that the amorphous layer is a carbon-rich composition of Si/C. The amorphous layer is clearly observed in samples grown at 1600{\deg}C for a range of growth pressures in argon, but not at 1500{\deg}C, suggesting a temperature-dependent formation mechanism.

Graphene formation on step-free 4H-SiC(0001)

Step-free SiC was thermally decomposed in vacuum to better understand graphene formation in the absence of step fronts. Atomic force microscopy revealed graphene nucleating at surface pits that preferentially form along SiC{11¯00} planes. The density of these pits is 1×108cm-2, which is three orders of magnitude greater than the measured density of SiC threading dislocations. Additionally, Raman spectroscopy demonstrated that graphene on step-free regions have a redshifted 2D peak position and a smaller peak width than does graphene grown on stepped regions. This difference is attributed to film thickness, which is confirmed by cross-sectional transmission electron microscopy. Stepped regions have a graphitic film nearly 2 nm thick as compared to less than 0.7 nm for step-free regions.

Controlled Growth of Ordered Nanopore Arrays in GaN

High-quality, ordered nanopores in semiconductors are attractive for numerous biological, electrical, and optical applications. Here, GaN nanorods with continuous pores running axially through their centers were grown by organometallic vapor phase epitaxy. The porous nanorods nucleate on an underlying (0001)-oriented GaN film through openings in a SiN(x) template that are milled by a focused ion beam, allowing direct placement of porous nanorods. Nanopores with diameters ranging from 20-155 nm were synthesized with crystalline sidewalls.

Atomic-layer-deposited LaAlO 3 /SrTiO 3 all oxide field-effect transistors

We have demonstrated well-behaved accumulation-mode all oxide NMOSFETs with amorphous atomic-layer-deposited (ALD) LaAlO<inf>3</inf> gate dielectric stacks on crystalline SrTiO<inf>3</inf> substrates. A maximum drain current exceeding 10 mA/mm has been obtained on a 3.75µm-gate-length device, proving a very conductive channel can be formed at the oxide-oxide interface. Four different gate dielectric stacks, which are Lafirst cycle LaAlO<inf>3</inf>, Al-first cycle LaAlO<inf>3</inf>, LaAlO<inf>3</inf> with 1.5 nm La<inf>2</inf>O<inf>3</inf> interfacial layer, and LaAlO<inf>3</inf> with 1.8 nm Al<inf>2</inf>O<inf>3</inf> interfacial layer, have been deposited on SrTiO<inf>3</inf> substrates to systematically study their effects on the conductivity at the different oxide-oxide interfaces. The experimental results show that a La-initiated interfacial layer is preferable to form a more conducting channel at the LaAlO<inf>3</inf>/SrTiO<inf>3</inf> interface. Low temperature characteristics have also been utilized to provide an in-depth understanding of the channel formation at the oxide-oxide interface. The availability of the MBE technology to epitaxially grow SrTiO<inf>3</inf> on Si substrate provides the pathway to integrate ALD LaAlO<inf>3</inf>/SrTiO<inf>3</inf> devices on Si platform.