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Dive into the research topics where Robert Milstrey is active.

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Featured researches published by Robert Milstrey.


asian solid state circuits conference | 2012

The first 22nm IA multi-CPU and GPU system-on-chip using tri-gate transistors

Scott E. Siers; Satish Damaraju; Varghese George; Sanjeev Jahagirdar; Tanveer R. Khondker; Robert Milstrey; Sanjib Sarkar; Israel Stolero; Arun Subbiah

This paper will go over some of the details of Intels latest Core offering, the first 22nm design code-named Ivy Bridge. In addition to the new process, Ivy Bridge offers several new features including significant improvements to the Graphics and Media block including DX11 support, new power/thermal control optimizations, support for 3 simultaneous displays, new security features and new PCIE Gen3 support. The new 22nm process provides exceptional low voltage performance advantage as well as a 2x improvement in density. The paper also reviews changes to leverage the low operating voltages as well as details of IO, PLL and clocking. Ivy Bridge was introduced into the market on April 23, 2012.


international solid-state circuits conference | 2012

A 22nm IA multi-CPU and GPU System-on-Chip

Satish Damaraju; Varghese George; Sanjeev Jahagirdar; Tanveer R. Khondker; Robert Milstrey; Sanjib Sarkar; Scott E. Siers; Israel Stolero; Arun Subbiah


Archive | 2015

Method And Apparatus For A Zero Voltage Processor Sleep State

Sanjeev Jahagirdar; Varghese George; John B. Conrad; Robert Milstrey; Stephen A. Fischer; Alon Naveh; Shai Rotem


Archive | 2003

Early data return indication mechanism

Belliappa Kuttanna; Robert Milstrey; Stanley J. Domen; Glenn J. Hinton


Archive | 2004

Method and apparatus to improve multi-CPU system performance for accesses to memory

James M. Dodd; Robert Milstrey


Archive | 2014

Method And Apparatus For A Zero Voltage Processor

Sanjeev Jahagirdar; Varghese George; John B. Conrad; Robert Milstrey; Stephen A. Fischer; Alon Naveh; Shai Rotem


Archive | 2010

Method and apparatus for powered off processor core mode

Sanjeev Jahagirdar; Varghese George; John B. Conrad; Robert Milstrey; Stephen A. Fischer; Alon Naveh; Shai Rotem


Archive | 2006

Early data return indication mechanism for data cache to detect readiness of data via an early data ready indication by scheduling, rescheduling, and replaying of requests in request queues

Belliappa Kuttanna; Robert Milstrey; Stanley J. Domen; Glenn J. Hinton


Archive | 2008

Address decode method and system

James M. Dodd; Robert Milstrey


Archive | 2006

Verfahren und Vorrichtung für einen Nullspannungs-Prozessorschlafzustand

Robert Milstrey; Alon Naveh; Varghese George; Sanjeev Jahagirdar; Stephen A. Fischer; John B. Conrad; Shai Rotem

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