Sanjeev Jahagirdar
Intel
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Publication
Featured researches published by Sanjeev Jahagirdar.
asian solid state circuits conference | 2007
Varghese George; Sanjeev Jahagirdar; Chao Tong; Ken Smits; Satish Damaraju; Scott E. Siers; Ves A. Naydenov; Tanveer R. Khondker; Sanjib Sarkar; Puneet Singh
This paper describes Penryn (codename), Intel–s next generation family of processors implemented in a 45nm High-k metal gate silicon process technology and designed to meet a wide range of power envelopes and market segments. It is a dual-core, 64-bit CPU based on the Core™ microarchitecture with a unified 24-way L2 cache of 6MB. Key new features in Penryn include a Fast Radix- 16 Divider, an SSE4 instruction set, a radically new Power Management state (Deep Power Down) and Enhanced Dynamic Acceleration Technology (EDAT). Active and leakage power reduction techniques are used throughout the design to reduce power consumption while not compromising the scalability requirements. The chip is offered in various package technologies including a MCP version for the Quad-core products.
ieee hot chips symposium | 2012
Sanjeev Jahagirdar; Varghese George; Inder M. Sodhi; Ryan D. Wells
This article consists of a collection of slides from the authors conference presentation on Ivy Bridge, power management applications of the third generation core Intel micro architecture. Some of the specific topics discussed include: an overview of the Ivy Bridge architecture and supported applications; power scaling and management facilities; core product features; power efficiency; voltage control and optimization technqiues; power sharing capabilities; and system architecture.
asian solid state circuits conference | 2012
Scott E. Siers; Satish Damaraju; Varghese George; Sanjeev Jahagirdar; Tanveer R. Khondker; Robert Milstrey; Sanjib Sarkar; Israel Stolero; Arun Subbiah
This paper will go over some of the details of Intels latest Core offering, the first 22nm design code-named Ivy Bridge. In addition to the new process, Ivy Bridge offers several new features including significant improvements to the Graphics and Media block including DX11 support, new power/thermal control optimizations, support for 3 simultaneous displays, new security features and new PCIE Gen3 support. The new 22nm process provides exceptional low voltage performance advantage as well as a 2x improvement in density. The paper also reviews changes to leverage the low operating voltages as well as details of IO, PLL and clocking. Ivy Bridge was introduced into the market on April 23, 2012.
Archive | 2006
Sanjeev Jahagirdar
international solid-state circuits conference | 2012
Satish Damaraju; Varghese George; Sanjeev Jahagirdar; Tanveer R. Khondker; Robert Milstrey; Sanjib Sarkar; Scott E. Siers; Israel Stolero; Arun Subbiah
Archive | 2015
Sanjeev Jahagirdar; Varghese George; John B. Conrad; Robert Milstrey; Stephen A. Fischer; Alon Naveh; Shai Rotem
Archive | 2006
Jose Allarey; Varghese George; Sanjeev Jahagirdar
Archive | 2004
Kedar Mangrulkar; Sanjeev Jahagirdar; Varghese George; Venkatesh Prasanna; Inder M. Sodhi
Archive | 2005
Sanjeev Jahagirdar; Varghese George; Jose Allarey; Eric Heit
Archive | 2013
Jose P. Allarey; Varghese George; Sanjeev Jahagirdar; Nathan J Ofer; Tomer Ziv