Rolf Jaehne
Advanced Micro Devices
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Publication
Featured researches published by Rolf Jaehne.
international solid-state circuits conference | 2003
Wolfram Kluge; Lutz Dathe; Rolf Jaehne; S. Ehrenreich; Dietmer Eggert
A 0.25/spl mu/m CMOS zero-IF transceiver with VCO and PLL (-111dBc/Hz at 1 MHz) has been implemented. The 3.1/spl times/3.1 mm/sup 2/ IC draws 86mA (RX) and 73mA (TX) from a 2.5V supply. The receiver exhibits a 5dB noise figure and 5/spl mu/s AGC settling time. RX channel filter, TX pulse shaping filter, filter calibration circuitry, 6b ADC, bandgap reference and TX preamplifier are included and controlled by a digital interface.
Archive | 2003
Rolf Jaehne; Lutz Dathe; Andreas Huschka
Archive | 2003
Rolf Jaehne; Wolfram Kluge; Thorsten Riedel
Archive | 2003
Rolf Jaehne; Wolfram Kluge; Thorsten Riedel
Archive | 2004
Wolfram Kluge; Torsten Bacher; Rolf Jaehne
Archive | 2004
Rolf Jaehne; Wolfram Kluge; Henry Drescher
Archive | 2004
Rolf Jaehne; Wolfram Kluge; Thorsten Riedel
Archive | 2004
Torsten Bacher; Rolf Jaehne; Wolfram Kluge
Archive | 2003
Rolf Jaehne; Wolfram Kluge; Thorsten Riedel
Archive | 2002
Lutz Dathe; Andreas Huschka; Rolf Jaehne
