Rolf Schaumann

The problem of on-chip automatic tuning in continuous-time integrated filters

A discussion is presented of the most important and difficult aspect of the design of fully integrated continuous-time filters: continuous, real-time, on-chip tuning of filter parameters against errors caused by such factors as fabrication tolerances, changes in operating conditions, parasitic effects, and aging. The origins of the errors in filter parameters are pointed out, and the generally adopted methods for automatic error correction are discussed. These methods are a phased-locking loop for tuning of frequency parameters and a magnitude-locking loop for maintaining the transfer characteristics shape. Guidelines are given to aid the designer in avoiding the most prevalent pitfalls, and an illustrative example is presented which incorporates the ideas and concepts discussed.<<ETX>>

Multiple-loop feedback topologies for the design of low-sensitivity active filters(Invited Paper)

Improved sensitivity performance of active filters in multiloop feedback (coupled) topologies is well known. Of the numerous design procedures available in the literature, in this paper those methods are reviewed which are based on first- or second-order building blocks in a feedback configuration. A statistical sensitivity measure is given which results in a realistic performance measure for the filters and which can be used to compare circuits and to optimize their design to achieve minimum sensitivity. Design procedures are provided for each topology, which result in realizations having minimum sensitivity and maximum dynamic range. Also, design tables for several examples are given, and the performance of some filters is demonstrated experimentally.

A high-frequency high-Q CMOS active inductor with DC bias control

The design of a very simple CMOS high-Q active inductor suitable for applications at low supply voltage and high frequencies is discussed. The inductor value, L, and the quality factor, Q, are independently adjustable by two PMOS varactors (variable capacitors). Alternatively, L can be tuned via a bias current. The inductors DC level is set by a bias voltage. The self-resonance frequency, f/sub r/, is larger than 1GHz and very high values of Q, up to Q=/spl infin/, can be obtained so that circuit can be used for constructing high-frequency oscillators. The performance of the electronic inductor is demonstrated by simulation.

Low-sensitivity high-frequency tunable active filter without external capacitors

An active filter is discussed which uses only resistors and two operational amplifiers represented by their single-pole model, but no external capacitors. The filter has very low sensitivities to all circuit parameters, is tunable over exceptionally wide frequency ranges, and is suitable for high-frequency and medium- Q applications. The usable frequency range is limited only by the validity of the single-pole model of the amplifiers used. The circuit may be used both as a lowpass and as a bandpass. Extensive room-temperature experimental results are presented.

Design of a 2.7-GHz linear OTA and a 250-MHz elliptic filter in bipolar transistor-array technology

The design of a tunable high-frequency fully differential bipolar operational transconductance amplifier (OTA) is presented. Techniques resulting in tunability and broadbanding are discussed, as are unavoidable tradeoffs resulting from the lack of a vertical pnp device. Using an 8-GHz bipolar transistor array process, the simulated -3-dB frequency of the OTA is over 2.7 GHz, the maximum linear input range is +or-2.5 V, and the power dissipation is 28 mW for a power supply of +or-5 V. The OTA can also operate at a +or-2.5 V. The design of a third-order elliptic OTA-C filter with cutoff frequency of 250 MHz and tuning range from 200 to 290 MHz is presented. Filter nonidealities are analyzed, and predistortion and compensation techniques, are discussed. Temperature variations from -30 to +100 degrees C and supply variations from +or-4.5 to +or-7.5 V change the cutoff frequency of the filter by less than 10%. The Q-factor can be electronically adjusted for all frequencies in the tuning range. >

A radio-frequency CMOS active inductor and its application in designing high-Q filters

An all-transistor CMOS active inductor with a self-resonance frequency f/sub R/=5.7 GHz is presented. Large f/sub R/ is achieved by forming an all-NMOS signal path. The measured quality factor, Q, is as high as 665, but Q can be infinite theoretically. Both f/sub R/ and Q are tunable via biasing and on-chip varactors. As an example for using the active inductor, a high-Q bandpass filter for radio-frequency applications is designed. The inductor circuit was implemented in TSMC 0.18-/spl mu/m standard digital CMOS technology and occupies an area of 26.6 /spl mu/m/spl times/30 /spl mu/m including double guardrings. For a supply voltage of 1.8 V, the circuit consumes 4.4 mW, and IIP3 is measured at V/sub pp/=270 mV.

A general approach to continuous-time Gm-C filters

A general topology for transconductance-capacitor (Gm-C) filters is presented that permits any continuous-time analog Gm-C filter to be analysed via a matrix-description. Based on these matrices, explicit formulas are derived for the transfer function and the sensitivities valid for any Gm-C filter topology. The approach leads to a useful relationship between the passive capacitor network of the filter and the degree of its transfer function. The matrix-based approach is formulated especially for efficient use in computer-aided analysis and design of Gm-C filters, but ‘hand designs’ of Gm-C IFLF and LF filters are given as illustrative examples. A new, more general definition of Gm-C state-space filters is proposed. Connections between the state matrices for voltage- and current-mode state-space Gm-C filters are formulated and two canonical transformations are defined that convert state-space filters into direct state-space ones, i.e. those having only grounded capacitors. Copyright

Current-mode amplifier/integrator for a field-programmable analog array

An electronically-programmable analog circuit (EPAC), based on the switched-capacitor (SC) technique, is an analog counterpart of digital FPGAs. The full speed potential of analog circuits, however, can be utilized only by continuous-time (CT) field-programmable analog arrays (FPAAs). In this paper an example of an FPAA structure with local interconnections is shown. Each cell derives a weighted sum of selected signals from four nearest neighbors, and optionally performs integration (ideal or lossy) to produce its own output signal.

A new virtual-instrumentation-based experimenting environment for undergraduate laboratories with application in research and manufacturing

An undergraduate laboratory based on a functionally complete set of virtual tools for laboratory experimenting is described in the paper. An outstanding feature of the experimenting environment is an easy-to-use, graphical user interface to a laboratory experiment. If significantly shortens the time needed to implement experimenter-defined laboratory procedures and eliminates the need for high-level-language programming on the experimenter side. Taking advantage of industry-wide standards such as VISA, GP-IB, and VXI, our virtual instruments can perform their function using either physical or simulated, local, or remote and network-distributed instruments coming from a variety of different manufacturers. A paperless laboratory with on-screen graded measurement reports was fully implemented. The environment as-is allows remote experimenting-world-wide in principle. It currently requires a remote LabVIEW/sup TM/ or XWindow/sup TM/ session. Work is in progress on giving full access to our virtual tools using Java/sup TM/-capable web browsers such as Netscape/sup TM/, Hot Java/sup TM/, or MS Explorer/sup TM/ and thus to provide students with a student-affordable remote experimenting platform.

A CMOS fully-balanced continuous-time IFLF filter design for read/write channels

The design and implementation method of a CMOS continuous-time inverse-follow-the-leader feedback (IFLF) filter are described. The approach permits the realization of arbitrary transfer functions. A seventh-order lowpass filter with equiripple delay and real zeros to effect a gain boost is implemented by using a linear, fully-balanced CMOS operational transconductance amplifier (OTA) which has high DC gain and extremely wide bandwidth. SPICE simulations show that the cut-off frequency of the lowpass filter without real zeros and with real zeros ranged from 5 to 20 MHz and 10 to 47 MHz, respectively. Total harmonic distortion (THD) is less than 0.45% for a differential input voltage of V/sub in/=1 V/sub pp/ at 1 MHz. Power consumption is 120 mW for a 5-V supply.