Roman Horff

Explaining the short-circuit capability of SiC MOSFETs by using a simple thermal transmission-line model

In this paper the short-circuit robustness of state of the art SiC MOSFETs is analysed and their short-circuit behaviour is compared to that of a modern IGBT. A simplified thermal model of the chip itself is used to explain the difference between the behaviour of IGBT and SiC MOSFET under short-circuit conditions. Further, this model is used to derive the requirements for short-circuit detection methods for SiC MOSFETs.

Optimised switching of a SiC MOSFET in a VSI using the body diode and additional Schottky barrier diode

In this paper the switching behaviour of SiC MOSFETs is regarded with respect to the influence of the free-wheeling diode. A double pulse test was performed using two silicon carbide Schottky barrier diodes (SBD) of different rated currents and the intrinsic body diode of a silicon carbide MOSFET. The switching losses of these three combinations are analysed to find the best combination of MOSFET and antiparallel diode for the application in a voltage source inverter (VSI). The body diode was found to dissipate not negligible switching losses. The effect of a silicon carbide Schottky barrier diode in high current SiC power modules is shown. Calculating the power capability, it is shown that the MOSFET inverter without SBD has the higher power density.

Current mismatch in paralleled phases of high power SiC modules due to threshold voltage unsymmetry and different gate-driver concepts

This paper analyzes the influence of the threshold voltage on the parallel connection of three phases of a high power SiC MOSFET module. The current mismatch and the resulting switching loss distribution between paralleled phases will be investigated. Two different gate-drive circuit concepts will be tested. The influence of the choice of the gate-resistor arrangement will be presented regarding the dynamic current distribution and switching losses.

Requirements to change from IGBT to Full SiC modules in an on-board railway power supply

In this paper the difference in switching characteristic and switching losses together with the effects of parasitic elements between silicon and silicon-carbide devices on the loss distribution are reviewed. A comparison between a standard silicon IGBT module and a Full SiC MOSFET module is being made on the basis of equal voltage overshoot and maximum switching speed of both devices. Potentials and limitations between the both devices are discussed for the use of Full SiC power module in on-board power supplies for railway application.

Comparison of converter topologies for battery-powered high-speed drives considering different cooling conditions and semiconductor materials for ultra light-weight hybrid systems

This paper presents a comparison of two-level and three-level converters for high frequency drives. The maximum output power per chip area is calculated and compared by the Total Harmonic Distortion (THD). A variable DC-link voltage is assumed and it is derived, that the three-level topologies suffer more from an increasing DC-link voltage than the two-level inverter. The influence of the cooling system on the choice of topology is discussed. It is shown that three-level converters do not profit as much as two-level inverter of the benefit from liquid cooling system in comparison to forced-air cooling. Regarding fast switching silicon carbide devices, a calculation shows, that the converter weight can be reduced significantly.

Comparing 650V and 900V SiC MOSFETs for the application in an automotive inverter

This paper researches the performance benefits of replacing the Si IGBTs and diodes in a power module for automotive drives with either 650 V or 900 V SiC MOSFETs. Evaluating the mean conduction and switching losses in a load profile allows a comparison of both voltage classes in order to show which class offers the lower overall losses in the given application. Furthermore, the influence on the switching losses of different gate driving methods and stray inductance of the commutation loops is investigated. It can be found that 900 V chips offer lower overall losses in combination with standard packages (middle to high commutation loop inductance) and standard gate driving methods (using only the gate resistance to control the switching speed). 650 V chips, however, profit from low inductive setups and smarter gate driving strategies, while at the same time displaying less oscillations during switching.