Ru-Yi Su

State-of-the-art device in high voltage power ICs with lowest on-state resistance

High performance LDMOS of 600–800V Vbdss has been developed with PB (Pbody)_Extension RESURF scheme for smart power applications. This device design demonstrates the lowest specific on-state resistance against to the latest publications (40% improvement than triple RESURF, 65% improvement than double RESURF in JI LDMOSFET) in 600–800V families and breaks 1-D silicon limit. This technology also surpasses the performance in thin SOI technology, yet it uses the bulk Si material and less manufacturing processing steps.

CMOS-compatible GaN-on-Si field-effect transistors for high voltage power applications

CMOS-compatible 100/650 V enhancement-mode FETs and 650 V depletion-mode MISFETs are fabricated on 6-inch AlGaN/GaN-on-Si wafers. They show high breakdown voltage and low specific on-resistance with good wafer uniformity. The importance of epitaxial quality is figured out in a key industrial item: high-temperature-reverse-bias-stress-induced on-state drain curent degradation. Optimization of epitaxial layers shows significant improvement of device reliability.

Design of 700V LIGBT with the suppressed substrate current in a 0.5um junction isolated technology

In this paper, a 700V lateral insulated gate bipolar transistor (LIGBT) design is proposed in a junction-isolated technology. Several key properties of LIGBT, such as hole injection leakage and breakdown-voltage, are investigated by using two-dimensional numerical simulator, MEDICI. To improve vertical junction isolation capability, an extra BLN (Buried-Layer N-type) layer is inserted in-between the BLP (Buried-Layer P-type) and the P-substrate, to enhance hole potential barrier and to block substrate leakage as well as to ensure high breakdown voltage (>;700V). An optimized LIGBT with high breakdown-voltage, very low substrate-leakage (<;0.1uA/um), and low switching turn-off time, are presented and analyzed.