Rüdiger Ebendt

Combining ordered best-first search with branch and bound for exact BDD minimization

Reduced-ordered binary decision diagrams (BDDs) are a data structure for efficient representation and manipulation of Boolean functions. They are frequently used in logic synthesis. The size of BDDs depends on a chosen variable ordering, i.e., the size may vary from linear to exponential, and the problem of improving the variable ordering is known to be NP-complete. In this paper, a new exact BDD minimization algorithm called A/sup stute/ is presented. Here, ordered best-first search, i.e., the A/sup */ algorithm, is combined with a classical branch-and-bound (B&B) algorithm. A/sup */ operates on a state space large parts of which are pruned by a best-first strategy expanding only the most promising states. Combining A/sup */ with B&B allows to avoid unnecessary computations and to save memory. Experimental results demonstrate the efficiency of our approach.

An improved branch and bound algorithm for exact BDD minimization

Ordered binary decision diagrams (BDDs) are a data structure for efficient representation and manipulation of Boolean functions. They are frequently used in logic synthesis and formal verification. The size of the BDDs depends on a chosen variable ordering, i.e., the size may vary from linear to exponential, and the problem of Improving the variable ordering is known to be NP-complete. In this paper, we present a new exact branch and bound technique for determining an optimal variable order. In contrast to all previous approaches that only considered one lower bound, our method makes use of a combination of three bounds and, by this, avoids unnecessary computations. The lower bounds are derived by generalization of a lower bound known from very large scale integration design. They allow one to build the BDD either top down or bottom up. Experimental results are given to show the efficiency of our approach.

Minimization of the expected path length in BDDs based on local changes

In many verification tools methods for functional simulation based on reduced ordered Binary Decision Diagrams (BDDs) are used. The evaluation time for a BDD can he crucial and is measured by the expected path length of the BDD. In this paper a new technique for BDD minimization with respect to the expected path length is suggested to reduce evaluation time. It is based on sifling and, unlike previous approaches, performs variable swaps with the same time complexity as the original sifting algorithm. Another field of application for BDDs is logic synthesis, often targeting Pass Transistor Logic (PTL) because of low power and low cost. A minimization of BDD size and chip area can lead to poor timing performances. We suggest to also use our method here, as the resulting BDDs show a very low maximal and average path delay. This supports the synthesis of high-speed PTL circuits at low area overhead. Experimental results are given to show the efficiency of our approach.

Improvements for constraint solving in the systemc verification library

For verification of complex system-on-chip designs often constraint-based randomization is used. This allows to simulate scenarios that may be difficult to generate manually. For the system description language SystemC the SystemC Verification (SCV) Library has been introduced. Besides advanced verification features like data introspection and transaction recording the SCV library enables constraint-based randomization forSystemC models. However, the SCV library has two disadvantages that restrict their practical use: There is no support of bit operators in SCV constraintsand the SCV constraint solver cannot guarantee a uniform distribution of the constraint solutions. In this paper we provide a detailed analysis of these problems and present solutions that have been integrated in the library.

Combination of Lower Bounds in Exact BDD Minimization

Ordered binary decision diagrams (BDDs) are a data structure for efficient representation and manipulation of Boolean functions. They are frequently used in logic synthesis and formal verification. The size of BDDs depends on a chosen variable ordering, i.e. the size may vary from linear to exponential, and the problem of improving the variable ordering is known to be NP-complete. In this paper we present a new exact branch & bound technique for determining an optimal variable order In contrast to all previous approaches, that only considered one lower bound, our method makes use of a combination of three bounds and by this avoids unnecessary computations. The lower bounds are derived by generalization of a lower bound known from VLSI design. They allow to build the BDD either top down or bottom up. Experimental results are given to show the efficiency of our approach.

Reducing the number of variable movements in exact BDD minimization

Ordered Binary Decision Diagrams (BDDs) are frequently used in logic synthesis. In this paper a new exact BDD minimization algorithm is presented, which is based on state space search. In contrast to all previous approaches, in which variables are moved through the BDD when exploring the state space, the new method makes use of a new technique to expand states to its successor states without expensive variable movements. Experimental results are given to show the efficiency of the approach.

Self evaluation of floating car data based on travel times from actual vehicle trajectories

Floating Car Data (FCD) fleets are a valuable data source to obtain travel times as basis for traffic information or route guidance systems. To deliver reliable traffic information and to improve algorithms and systems for generating FCD from GPS positions their current quality has to be evaluated first. In this contribution the travel times from actual vehicle trips are compared with travel times for each edge on those trips as they result from the FCD algorithm. About 540,000 trajectories generated by more than 4,000 taxis at the four Wednesdays in October 2010 are the basis for this comparison.

Effect of improved lower bounds in dynamic BDD reordering

In this paper, we present new lower bounds on binary decision diagram (BDD) size. These lower bounds are derived from more general lower bounds that recently were given in the context of exact BDD minimization. The results presented in this paper are twofold. First, we gain deeper insight by looking at the theory behind the new lower bounds. Examples lead to a better understanding, showing that the new lower bounds are effective in situations where this is not the case for previous lower bounds and vice versa. Following the constraints in practice, we then compromise between run time and quality of the lower bounds. Finally, a clever combination of old and new lower bounds results in a final tight lower bound, yielding a significant improvement. Experimental results show the efficiency of our approach.

Evaluation of Microsimulated Traffic Light Optimisation Using V2I Technology

Within the research project KOLINE a cooperative system for urban road transport is developed. Its traffic related goals are to reduce travel time and fuel consumption as well as noise and pollutant emissions. The herein described evaluation shall determine whether, to which extent and how economically the KOLINE system is able to address these goals. Three differently comprehensive quantifying evaluation procedures are applied to the outputs of a microscopic traffic simulation. Thus not only the ranking of all scenarios, but also comparisons between these procedures become possible.

Quasi-exact BDD minimization using relaxed best-first search

In this paper, we present a new method for quasi-exact optimization of BDDs using relaxed ordered best-first search. This general method is applied to BDD minimization. In contrast to a known relaxation of A*, the new method guarantees to expand every state exactly once if guided by a monotone heuristic function. By that, it effectively accounts for aspects of run time while still guaranteeing that the cost of the solution does not exceed the optimal cost by a factor greater than (1 + /spl epsi/)/sup /spl lfloor/n/2/spl rfloor// where n is the maximal length of a solution path. E.g., for 25 BDD variables and using a degree of relaxation of 5%, the BDD size is guaranteed to be not greater than 1.8 times the optimal size. Within a range of reasonable choices for /spl epsi/, the method allows the user to trade off run time for solution quality. Experimental results demonstrate large reductions in run time when compared to the best known exact approach. Moreover, the quality of the obtained solutions is much better than the quality guaranteed by the theory.