Ruo-He Yao

A New Voltage-Programmed Pixel Circuit for Enhancing the Uniformity of AMOLED Displays

This letter presents a new voltage-programmed pixel circuit for the active-matrix organic light-emitting diode (AMOLED) displays, which consists of one driving thin-film transistor (TFT), four switching TFTs, two capacitors, and three control signal lines. The proposed pixel circuit can effectively compensate for the threshold-voltage shift of the driving TFT and the OLED degradation, which is verified by the simulation work using SMART-SPICE software. It is shown that the average nonuniformity of the OLED current for the proposed pixel circuit is 5.7% compared with 85.7% for the conventional 2T1C pixel circuit, and thus, the brightness uniformity of AMOLED displays can be enhanced. Moreover, a high contrast ratio can be achieved by the proposed pixel circuit since the OLED does not emit any light except for the emission period.

An AC Driving Pixel Circuit Compensating for TFTs Threshold-Voltage Shift and OLED Degradation for AMOLED

This paper presents an ac driving pixel circuit for active-matrix organic light-emitting diode (AMOLED) displays, which is composed of one driving thin-film transistor (TFT), three switching TFTs and one capacitor. The proposed pixel circuit can not only make OLED work at the ac driving mode, but also effectively compensate for the threshold-voltage shift of the driving TFT and the degradation of OLED. Simulation results show that the nonuniformity of the proposed pixel circuit is significantly reduced (<; 10%) with an average value of 4.2% compared with that of the conventional 2T1C pixel circuit, and thus, the brightness uniformity of AMOLED displays can be enhanced. Moreover, a high contrast ratio can be achieved by the proposed pixel circuit due to no light emitting except for the emission period, as well as a relatively high aperture ratio due to a small number of components.

A New Definition of the Threshold Voltage for Amorphous InGaZnO Thin-Film Transistors

An important parameter which characterizes thin-film transistors (TFTs) is the threshold voltage. Various methods have been proposed to extract the threshold voltage in amorphous InGaZnO (a-IGZO) TFTs, but few models have been presented based on material characteristics and the carrier transport. With regard to a-IGZO films, under low carrier concentrations, current conduction would be dominated by trap-limited conduction, while it switches to the percolation conduction mechanism as the carrier concentration increased and the degenerate conduction is achieved at higher carrier concentrations. In this case, the threshold voltage can be defined as the gate voltage when the degenerate conduction comes into existence, and then a physics-based method of threshold voltage extraction for a-IGZO TFTs is developed. The accuracy of the proposed model was proved by comparison with the measured data. As the new definition makes it possible to combine the threshold voltage with the material property, it is expected to play a significant role in the device modeling for the simulation of circuits based on a-IGZO TFTs.

A Low-Power High-Stability Flexible Scan Driver Integrated by IZO TFTs

This brief presents a low-power high-stability scan driver integrated by In-Zn-O (IZO) TFTs on polyimide substrate. Observed from the experimental results of the scan driver with 48 stages, there is no distortion and good noise-suppressed characteristics for the output waveforms. In one stage of the proposed scan driver, there only needs a small TFT connected to clock signals by using a feedback inverter and a dc output module to minimize the dynamic power consumption. It is measured that the power consumption for one stage of the proposed gate driver is 18.3 μW at the output swing of 15.3 V and the clock frequency of 50 kHz. There is a good noise-suppressed characteristic and high stability for the proposed scan driver as shown from a 300-h test.

Enhanced adhesion and field emission of CuO nanowires synthesized by simply modified thermal oxidation technique.

Metal oxide nanowires (NWs) can be easily grown by the thermal oxidation method, but the low adhesion between the NWs and the substrate restricts their practical applications in functional devices. In this work, the conventional hotplate technique is simply modified by introducing one or two stainless steel plates to supply a more stable oxidation environment, which is found to be beneficial to the growth and adhesion of CuO NWs on the Cu substrate. In detail, the Cu foils were heated on the hotplate directly, on one plate over the hotplate, and between two plates over the hotplate at 400 °C in ambient condition. It is found that the NWs obtained between two plates exhibit large length and diameter with moderate density. The sufficient activated oxygen, stable temperature, and proper temperature gradient configuration caused by the two plates accelerate the formation of CuO NWs, and result in the longest NWs with enhanced adhesion. The grain-boundary diffusion and Kirkendall effect are proposed to explain the mechanism of NWs growth and the formation of cracks. The NWs obtained between two plates also showed the best field emission properties, with lowest turn-on field (5.31 V μm(-1)) and threshold field (9.8 V μm(-1)). Excellent field emission properties and enhanced NW-substrate adhesion indicate that these NW arrays could be potentially used as the cathode of field emission displays.

High-Speed Voltage-Programmed Pixel Circuit for AMOLED Displays Employing Threshold Voltage One-Time Detection Method

This letter presents a high-speed, voltage-programmed pixel circuit for active-matrix organic light-emitting diode displays employing threshold voltage one-time detection method. The proposed pixel circuit that consists of one driving thin-film transistor (TFT), four switching TFTs, two capacitors, and four control signal lines can effectively compensate for the threshold voltage shift of the driving TFT and the OLED degradation. The threshold voltage of one-time detection method is realized by an ingenious application of capacitor coupling effect, and it is well-verified by comparing it with the conventional driving scheme. In this method, data is directly renewed without the periods of initialization and threshold voltage detection from the second-frame beginning. Moreover, this method can also be applied to other compensation pixel circuits.

An Improvement of the Capacitance–Voltage Method to Determine the Band Offsets in a-Si:H/c-Si Heterojunctions

Due to the strong inversion layer at the c-Si interface, there may be errors in the determination of the band offsets in a-Si:H/c-Si heterojunctions from the usual capacitance-voltage (C-V) method. Considering the charge effect in the strong inversion layer, the theoretical differential capacitance in (n+) a-Si:H/(p) c-Si heterojunctions at high frequency is developed. The calculated results of the capacitance show that, the errors depend on the minority carrier density at the c-Si interface, and increase with increasing conduction band offset in (n+) a-Si:H/(p) c-Si heterojunction solar cells. The apparent diffusion potential Vint accounts for the charge effect in the inversion layer. Particularly, a modification to the apparent diffusion potential is presented, and the simulation results show that the modified apparent diffusion potential Vint almost agrees with the theoretical value for various conduction band offsets. Accordingly, the band offsets are determined more precisely from the improved C-V method. However, there is still a small difference between VD and Vint as well as slight errors at the high values of AEC. The improved C-V method is based on the usual C-V method and the static coplanar conductance measurement to determine the band offsets.

An Analytical Subthreshold Model for Polysilicon Thin-Film Transistors by a Quasi-Two-Dimensional Solution

An analytical expression of the surface potential for polysilicon thin-film transistors (poly-Si TFTs) working in the subthreshold region is obtained, following a quasi-2-D Poissons equation, and then, an analytical subthreshold current model is subsequently developed based on the processes of diffusion and thermal emission. Furthermore, the kink effect is also taken into account in the subthreshold current model. Consequently, an analytical expression of the subthreshold swing is obtained from the surface potential equation and the subthreshold current expression. It is easily shown in our model that the subthreshold swing of poly-Si TFTs decreases with reducing the trap states or enlarging the grain size, and then, the switching performance of poly-Si TFTs will be improved. Moreover, this model has a simple functional form, and it can reduce to that of the conventional long-channel MOSFET in the case of large grain size and low trap states. The model has been verified by comparing simulated results with experimental data.

Characterization of interface states in a-Si : H/c-Si heterojunctions by an expression of the theoretical diffusion capacitance

Capacitance spectroscopy under illumination and at a forward bias close to the open-circuit voltage (Voc) has recently been proposed to characterize interface states in a-Si?:?H/c-Si heterojunctions, and the interface defect density, Dit, is estimated from the simulations of capacitance. In this paper, the theoretical diffusion capacitance, CD, is presented for measurement to directly characterize the interface states. By solving the excess minority carrier density in c-Si when interface states are introduced, the expression of CD is developed as a function of Dit, the excess minority carrier density out of c-Si depletion and diffusion regions, ?n, and the carrier diffusion lengths in c-Si. CD decreases with increasing Dit since the interface states act as recombination centres to decrease the excess carrier density in c-Si. The measurement is sensitive to Dit down to 1010?cm?2?eV?1. Accordingly, in the measurement of ?n and the carrier diffusion lengths in c-Si, the interface states can be characterized directly and accurately by the theoretical diffusion capacitance.

A New Extraction Method of Trap States in Amorphous InGaZnO Thin-Film Transistors

A method to extract the density of subgap states in amorphous InGaZnO thin-film transistors is proposed. The nonuniform characteristic of surface potential along the channel has been taken into account. The variation of interface state density with the applied bias voltage is derived from the capacitance-voltage characteristic. In addition, by combining the obtained density of interface states with the subthreshold swing, the energy distribution of bulk traps is determined. Results fit well with the experimental data.