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Dive into the research topics where Ryo Ikoma is active.

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Featured researches published by Ryo Ikoma.


international workshop on junction technology | 2017

Transfer printing of nanostructured membrane with elastomeric stamp and its application to TMDC-based field-effect transistors

Takamasa Kawanago; Wanjing Du; Ryo Ikoma; Tomoaki Oba; Hiroyuki Takagi; Shunri Oda

This paper describes a basic concept relevant to deterministic transfer of molybdenum disulfide (MoS2) with optically transparent elastomeric stamp for constructing field-effect transistors (FETs). A simple fabrication process involving the formation of gate dielectrics and gate electrode, the deposition of source/drain contacts and the lamination of MoS2 flakes is established. The proposed method is suitable for research in electrical characteristics of various TMDC FETs.


international workshop on junction technology | 2017

Heavily-doped SOI substrate and transfer printing for charge injection into TMDC layer

Ryo Ikoma; Takamasa Kawanago

Layered semiconductors of transition metal dichalcogenides (TMDC) have been considerable attention for both scientific interest and practical applications [1]. This paper describes a method to fabricate TMDC field-effect transistors (FETs) with heavily-doped silicon on insulator (SOI) substrate. The FETs are constructed by transfer of TMDC crystals on the surface of pre-patterned SOI substrate. This method can eliminate the deposition of metals and dielectrics on a TMDC surface [2]. In addition, various TMDC can be applied to the fabrication of FETs. The heavily-doped SOI serves as a gate electrode, while an efficient injection of carriers into TMDC can be accomplished because of overlap structure between gate electrode and source/drain contacts. The device characteristics are investigated.


european solid state device research conference | 2017

Radical oxidation process for hybrid SAM/HfO x gate dielectrics in MoS 2 FETs

Takamasa Kawanago; Ryo Ikoma; Tomoaki Oba; Hiroyuki Takagi

This study describes the fabrication of hybrid SAM/HfOx gate dielectrics by the radical oxidation in molybdenum disulfide (MoS2)field-effect transistors (FETs). The fabrication process involves the radical oxidation to form HfOx at the surface of metallic HfN, SAM formation by immersion, and deterministic transfer of MoS2 flakes. A subthreshold slope (SS) of 75 mV/dec and small hysteresis were demonstrated with the hybrid SAM/HfOx gate dielectrics accompanied by a low gate leakage current. TEM observation revealed a uniform formation of HfOx at the surface of HfN. This study opens up intriguing possibilities of radical oxidation process for research in the applications and developments for functional electronic devices.


Applied Physics Letters | 2017

Fabrication of hybrid self-assembled monolayer/hafnium oxide gate dielectric by radical oxidation for molybdenum disulfide field-effect transistors

Takamasa Kawanago; Ryo Ikoma; Tomoaki Oba; Hiroyuki Takagi

In this study, radical oxidation is applied to the fabrication of a hybrid self-assembled monolayer (SAM)/hafnium oxide (HfOx) gate dielectric in molybdenum disulfide (MoS2) field-effect transistors. The fabrication process involves radical oxidation to form HfOx at the surface of metallic HfN, SAM formation by immersion, and the deterministic transfer of MoS2 flakes. A subthreshold slope of 75 mV/dec and small hysteresis were demonstrated, indicating superior interfacial properties. Cross-sectional transmission electron microscopy revealed the uniform formation of the HfOx layer at the surface of HfN. The SAM is indispensable for the superior interfacial properties in MoS2 field-effect transistors. The radical oxidation is not restricted to the oxidation of silicon and germanium substrates and was also found to be applicable to the fabrication of a high-k gate dielectric. This study opens up interesting possibilities of radical oxidation for research on functional electronic devices.


european solid state device research conference | 2016

Adhesion lithography to fabricate MoS 2 FETs with self-assembled monolayer-based gate dielectrics

Takamasa Kawanago; Ryo Ikoma; Du Wanjing; Shunri Oda

This study describes the fabrication of molybdenum disulfide (MoS2) field-effect transistors (FETs) using adhesion lithography and self-assembled monolayer (SAM)-based gate dielectrics. The adhesion lithography involves the formation of a SAM on metal oxides and selective removal of metal layer from the surface of SAM. Electrical characteristics of MoS2 FETs in this study resemble those of MoS2 FETs fabricated by photolithography. Hysteresis in Id-Vg characteristics is found to be reduced by forming gas annealing at 150 °C for 30 min. Furthermore, it is found that the SAM-based gate dielectrics is thermally stable at annealing temperature up to 300 °C. This study opens up new directions for research in the applications and developments of the SAM for functional electronic devices.


ieee electron devices technology and manufacturing conference | 2018

Polarity Control in WSe 2 Field-Effect Transistors using Dual Gate Architecture

Hiroyuki Takagi; Ryo Ikoma; Tomoaki Oba; Takamasa Kawanago


european solid state device research conference | 2018

Gated Four-Probe Method to Evaluate the Impact of SAM Gate Dielectric on Mobility in MoS2 FET

Takamasa Kawanago; Tomoaki Oba; Ryo Ikoma; Hiroyuki Takagi; Shunri Oda


The Japan Society of Applied Physics | 2018

Hybrid self-assembled monolayer/hafnium oxide gate dielectric for MoS 2 FET

Takamasa Kawanago; Ryo Ikoma; Tomoaki Oba; Hiroyuki Takagi


The Japan Society of Applied Physics | 2018

Back-gate bias architecture for control of carrier injection in WSe 2 FET

Takamasa Kawanago; Hiroyuki Takagi; Ryo Ikoma; Tomoaki Oba


The Japan Society of Applied Physics | 2017

Adhesion lithography with self-assembled monolayer to fabricate MoS 2 FET

Takamasa Kawanago; Ryo Ikoma; Wanjing Du; Shunri Oda

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Takamasa Kawanago

Tokyo Institute of Technology

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Tomoaki Oba

Tokyo Institute of Technology

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Hiroyuki Takagi

Tokyo Institute of Technology

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Shunri Oda

Tokyo Institute of Technology

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Wanjing Du

Tokyo Institute of Technology

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Du Wanjing

Tokyo Institute of Technology

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