Ryoji Oritsuki

Threshold Voltage Shift of Amorphous Silicon Thin-Film Transistors During Pulse Operation

The threshold voltage shift of amorphous silicon thin film transistors (TFTs) under pulse operation is discussed. The stress time, stress voltage, duty ratio and frequency dependence of the shift have been measured. A positive voltage stress causes a constant shift, when the frequency is in the range from DC to over 100 kHz. On the other hand, the shift under a negative pulse stress depends on its repetition frequency and its pulse width and can be described by an equivalent circuit model. Based on these data, a more reliable estimate of the long-term reliability of an amorphous silicon TFT panel has been realized.

Threshold Voltage Shift of a-Si TFTs during Pulse Operation

The threshold voltage shift of anorphous -Si TFTs under pulse operation is discussed. The duty ratio and frequency dependence of the shift have been measured. A positive pulse stress causes a shift equivalent to that of DC voltage stress. 0n the other hand, a negative pulse stress decreases the amount of the shift depending on its pulse width and can be accurately described by an equivalent circuit model. Based on these data, a nore dependable estimate of the long -tern reliability of an anorphous-Si TFT panel has been realized.