S. Zourob
Oxford Brookes University
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Publication
Featured researches published by S. Zourob.
2017 Second International Conference on Electrical, Computer and Communication Technologies (ICECCT) | 2017
R. Nagulapalli; K. Hayatleh; S. Barker; S. Zourob; A. Venkatareddy
In this a paper a novel CMOS technology friendly opamp compensation has been presented and explained intuitively miller compensation pole splitting. Present technique utilizes grounded capacitor and having better PSRR. Open loop transfer functions have been derived to show the proposed technique is low power for the same bandwidth. Implemented in 65nm CMOS technology and simulated with Spectre. Simulation results shows that the proposed opamp achieves FOM ∼83333.Opamp consumes 25uA from 1V supply and occupying 5184um2 silicon area.
Journal of Circuits, Systems, and Computers | 2018
R. Nagulapalli; K. Hayatleh; S. Barker; B. Yassine; S. Zourob; Sumathi Raparthy; N. Yassine
This paper explains the hidden positive feedback in a two-stage fully differential amplifier through external feedback resistors and possible DC latch-up during the amplifier start-up. The biasing ...
ieee international conference on recent trends in electronics information communication technology | 2017
R. Nagulapalli; S. Zourob; K. Hayatleh; N. Yassine; S. Barker; A. Venkatareddy
In this paper a low OpAmp compensation technique suitable for the bio-medical application has been proposed and intuitive explained the existing compensation techniques. The Present technique relies on the passive damping factor control rather power hungry damping. Implemented in 45nm CMOS technology and simulated with Spectre. Simulation results shows that 100dB dc gain, well compensated 25MHz bandwidth OpAmp while driving a 1pF capacitive load. Draws with 12uW power consumption from 1V supply and occupying 0.004875mm2 silicon areas.
2017 Second International Conference on Electrical, Computer and Communication Technologies (ICECCT) | 2017
R. Nagulapalli; K. Hayatleh; S. Barker; S. Zourob; A. Venkatareddy
In this paper a novel CMOS temperature and supply voltage independent current reference has been proposed. This design is based on subtraction of two scaled version PTAT (proportional to temperature) currents to get temperature independent current reference. Implemented in 45nm CMOS technology and simulated with Spectre. Simulation results shows that the proposed current reference achieves temperature coefficient of 22ppm/°C against temperature variation of −4O°C–120°C and line sensitivity of 337ppm/V against supply variation of 0.6–1.8V, while consuming 135uW from 1.8V supply and occupying 5184um2.
2017 International Conference on Recent Advances in Electronics and Communication Technology (ICRAECT) | 2017
R. Nagulapalli; K. Hayatleh; S. Barker; S. Zourob; N. Yassine; Sriadibhatla Sridevi
In this paper a microwatt low voltage bandgap reference suitable for the bio-medical application. The Present technique relies on the principle of generating CTAT and PTAT without using any (Bipolar Junction Transistor) BJT and adding them with a proper scaling factor for minimal temperature sensitive reference voltage. Beta multiplier reference circuit has been explored to generate CTAT and PTAT. Implemented in 45nm CMOS technology and simulated with Spectre. Simulation results shows that the proposed reference circuit exhibits 1.2% variation at nominal 745mV output voltage. The circuit consumes 16uW from 0.8V supply and occupying 0.004875mm2 silicon area.
Journal of Circuits, Systems, and Computers | 2018
K. Hayatleh; S. Zourob; R. Nagulapalli; S. Barker; N. Yassine; P. Georgiou; F.J. Lidgey
Analog Integrated Circuits and Signal Processing | 2018
R. Nagulapalli; K. Hayatleh; S. Barker; S. Zourob; N. Yassine; Sumathi Raparthy; A.A. Tammam
Analog Integrated Circuits and Signal Processing | 2018
S. Zourob; K. Hayatleh; S. Barker; R. Nagulapalli; N. Yassine; Roger Ramsbottom; John Lidgey
Analog Integrated Circuits and Signal Processing | 2018
R. Nagulapalli; K. Hayatleh; S. Barker; S. Zourob; N. Yassine
2017 International conference on Microelectronic Devices, Circuits and Systems (ICMDCS) | 2017
R. Nagulapalli; K. Hayatleh; S. Barker; S. Zourob; N. Yassine; Sriadibhatla Sridevi