Sajal K. Paul
Indian Institutes of Technology
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Publication
Featured researches published by Sajal K. Paul.
Microelectronics Journal | 2017
Rajeev Kumar Ranjan; Nishtha Rani; R. K. Pal; Sajal K. Paul; Gaurav Kanyal
This paper reports a new charge controlled practical memristor emulator circuit based on single current conveyor transconductance amplifier (CCTA). The proposed grounded and floating type memristor emulator circuit can be configured as both incremental and decremental types. Both the floating and grounded memristors are obtained simultaneously from the same circuit without any alteration. The circuit is very simple as compared to existing circuits and avoids the utilization of ADC, DAC, analog multiplier and multiple sub-circuits. It exploits the controllability of transconductance of CCTA for multiplication. It performs well up to a few MHz. Experimental verification of this circuit has been performed using the commercially available integrated circuits, CFOA (AD844AN) and OTA (CA3080). It has been tested at a frequency range from 5kHz to 30kHz. Moreover, as an application, amplitude modulation (AM) of frequency modulated (FM) signal and demodulation using the proposed memristor emulator circuit has been discussed. It confirms the functionality of the proposed circuit. The PSPICE simulation results and experimentally obtained results are included.
Journal of Circuits, Systems, and Computers | 2016
Rajeev Ranjan; Chandan Kr. Choubey; Bal Chand Nagar; Sajal K. Paul
A new approach to the design of a comb filter using current conveyor is proposed to eliminate the undesired harmonic interference from biomedical signal. In this approach, a number of inverted band pass filters are used to construct a comb filter. The components used are second generation current conveyor (CCII), capacitor and resistor. To verify the performance of the proposed circuit, the comb filter is designed to eliminate the unwanted power line frequency of 60Hz and its odd harmonics such as 180, 300 and 420Hz. The proposed circuit is simulated by implementing CCII± using a macro model of commercially available CFOA IC AD844 as well as 0.18μm CMOS technology. The circuit is also verified experimentally by using commercially available IC AD844. The effectiveness of harmonic removal has also been tested.
Archive | 2018
Bal Chand Nagar; Sajal K. Paul
A new configuration for realizing third-order quadrature oscillator (TOQO) circuit using operational transresistance amplifier (OTRA) with voltage output is presented. It may also be reported as MOS-C realization, which eases the integrated circuit implementation. It uses two OTRAs, four resistors, and three capacitors. The frequency of oscillation and condition of oscillation are orthogonally controllable. The effect of non-ideality analysis of the circuit is also given and found that at high frequency the effect of parasitic capacitance is negligible. PSPICE simulations and experimental test are provided to verify all the theoretical analysis.
Archive | 2018
Ajay Kumar Kushwaha; Ashok Kumar; Sajal K. Paul
The realization of voltage mode (VM) and current mode (CM) sinusoidal oscillator using current-controlled differential difference current conveyor transconductance amplifier (CCDDCCTA) and all grounded passive elements is proposed. The circuit configuration consists of single CCDDCCTA, two capacitors, and single resistor. The utilization of grounded passive components is good for IC fabrication. The frequency of oscillation can be altered independent of condition of oscillation by external bias currents. The passive sensitivities are low. The PSPICE based OrCAD 16.6 circuit simulator is used to perform simulations. The CCDDCCTA building block has been designed using CMOS 0.25 µm TSMC technology parameters. Simulation results to verify the theory are given.
Archive | 2018
Ashok Kumar; Ajay Kumar Kushwaha; Sajal K. Paul
In this article, a new design for realizing voltage-mode (VM) first order all-pass filter (APF) using single dual-X second generation current conveyor (DXCCII), one capacitor, one grounded resistor and one NMOS transistor operating in triode region is presented. The proposed circuit is analyzed for non-ideality presence due to voltage and current tracking errors and also due to parasitic components of the DXCCII to check the effect on functionality of proposed all-pass filter . PSPICE simulation and AD844 analogue IC-based experimental results are included to verify the proposed theory of the circuit.
2016 IEEE International Conference on Advances in Electronics, Communication and Computer Technology (ICAECCT) | 2016
Chandan Kumar Choubey; Akanksha Sahani; Sajal K. Paul
This paper presents the design of a dynamic threshold voltage MOS transistor (DTMOS) based ultra-low power comb filter to eliminate the power line interference from biomedical signals like ECG and EEG signals. The approach used to design the comb filter successfully demonstrates the application of low power second generation current conveyor (CCII) whose power consumption is as low as 0.214µW. In this approach, a number of inverted band pass filters (IBPFs) of various center frequencies and quality factors have been used. All Inverted Band Pass Filters have been designed using low power CCII and passive components (resistors and capacitors). The DTMOS technique used makes the comb circuit capable of working under a low supply voltage with total power consumption of 7.54µW only. The functionality and effectiveness of the presented design is investigated through PSPICE simulations.
2016 IEEE International Conference on Advances in Electronics, Communication and Computer Technology (ICAECCT) | 2016
Chandan Kumar Choubey; Gaurav Tiwari; Sajal K. Paul
In this paper, we proposed a number of new inverse highpass (IHP), inverse bandpass (IBP), and inverse lowpass (ILP) filters using second generation current conveyor (CCII) as building blocks. The proposed two topologies can be configured as one of the above mentioned inversed filter by the selection of appropriate admittance. To test the functionality of the proposed multifunction inverse filter, the circuit was simulated using PSPICE simulator software. In simulation of the circuits, the CCII circuit was designed using macro model of AD844 IC. The simulated results are well agreed with the theoretical results.
Analog Integrated Circuits and Signal Processing | 2017
Bal Chand Nagar; Sajal K. Paul
Analog Integrated Circuits and Signal Processing | 2018
Bal Chand Nagar; Sajal K. Paul
Journal of Circuits, Systems, and Computers | 2018
Praveen Kumar; Neeta Pandey; Sajal K. Paul