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Dive into the research topics where Neeta Pandey is active.

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Featured researches published by Neeta Pandey.


International Journal of Electronics | 2004

All-pass filters based on CCII− and CCCII−

Neeta Pandey; Sajal K. Paul

This paper proposes a first-order all-pass filter using one negative type second-generation current conveyor (CCII−), two resistors and a capacitor. From the proposed CCII− based filter, by replacing the CCII− and a resistor by a negative second-generation current-controlled conveyor (CCCII−) a new filter is developed which requires only one each of CCCII−, capacitor and resistor. The experimental and simulated results are found in good agreement with theoretical analysis. The circuits are also analyzed for non-ideal current conveyors to show that they still function as all-pass filters but with slight altered values of gain and phase.


Journal of Electrical and Computer Engineering | 2011

Differential difference current conveyor transconductance amplifier: a new analog building block for signal processing

Neeta Pandey; Sajal K. Paul

A new active building block for analog signal processing, namely, differential difference current conveyor transconductance amplifier (DDCCTA), is presented, and performance is checked through PSPICE simulations which show the usability of the proposed element is up to 201 MHz. The proposed block is implemented using 0.25 µm TSMC CMOS technology. Some of the applications are presented using the proposed DDCCTA, namely, a voltage mode multifunction filter, a current mode universal filter, an oscillator, current and voltage amplifiers, and grounded inductor simulator. The feasibility of DDCCTA and its applications is confirmed via PSPICE simulations.


IEICE Electronics Express | 2006

A new mixed mode biquad using reduced number of active and passive elements

Neeta Pandey; Sajal K. Paul; Asok Bhattacharyya; S. B. Jain

The configuration that can work in mixed mode may be useful from IC realization viewpoint and application adaptability. This paper proposes a generalized mixed mode universal filter configuration that may be used in all possible modes i.e. voltage mode, current mode, trans-impedance mode and trans-admittance mode. The architecture uses minimum number of active and passive components reported till date and can realize all generic filter functions: low pass, band pass, high pass, notch and all pass. PSPICE simulation results agree well with experimental values.


Active and Passive Electronic Components | 2011

VM and CM Universal Filters Based on Single DVCCTA

Neeta Pandey; Sajal K. Paul

A universal voltage-mode filter (VM) and a current-mode filter (CM) based on recently proposed active building block, namely, differential voltage current conveyor transconductance amplifier (DVCCTA) are proposed. Both the circuits use a single DVCCTA, two capacitors, and a single resistor. The filters enjoy low-sensitivity performance and low component spread and exhibit electronic tunability of filter parameters via bias currents of DVCCTA. SPICE simulation using 0.25 μm TSMC CMOS technology parameters is included to show the workability of the proposed circuits.


IEICE Electronics Express | 2005

A novel current controlled current mode universal filter: SITO approach

Neeta Pandey; Sajal K. Paul; Asok Bhattacharyya; S. B. Jain

A novel electronically tunable single-input three-output (SITO) universal filter employing three current controlled conveyors and two grounded capacitors is presented. The proposed filter offers the following advantageous features: low input impedance and high output impedance- a desirable property of current mode filters, realization of low pass, band pass, high pass, notch and all pass signals from the same configuration, no matching constraint, low sensitivity performance and use of grounded capacitors ideal for integration. The validity of the proposed filter is verified through PSPICE simulations.


International Scholarly Research Notices | 2014

OTRA Based Voltage Mode Third Order Quadrature Oscillator

Rajeshwari Pandey; Neeta Pandey; Gurumurthy Komanapalli; Rashika Anurag

Two topologies of operational transresistance (OTRA) based third order quadrature oscillators (QO) are proposed in this paper. The proposed oscillators are designed using a combination of lossy and lossless integrators. The proposed topologies can be made fully integrated by implementing the resistors using matched transistors operating in linear region, which also facilitates electronic tuning of oscillation frequency. The nonideality analysis of the circuit is also given and for high frequency applications self-compensation can be used. Workability of the proposed QOs is verified through PSPICE simulations using 0.5 μm AGILENT CMOS process parameters. The total harmonic distortion (THD) for both the QO designs is found to be less than 1%.


Iet Circuits Devices & Systems | 2015

Approach for third order quadrature oscillator realisation

Neeta Pandey; Rajeshwari Pandey

This paper presents a new approach for third order quadrature oscillator (QO) realisation. It uses a high pass filter and differentiator connected in a feedback loop. A differential voltage current conveyor transconductance amplifier (DVCCTA) is employed to verify the proposed approach. Two circuit topologies of QO have been proposed. Both the topologies utilise two DVCCTA and three grounded capacitors. In addition, the first topology employs a single resistor while the second makes use of two resistors. The circuits exhibit orthogonal control on frequency and condition of oscillation. The quadrature current outputs are available at high output impedance and voltage outputs are also present. The theoretical proposition has been verified through SPICE simulations using 0.25 μm Taiwan semiconductor manufacturing company (TSMC) complementary metal oxide semiconductor (CMOS) technology parameters. Experimental results are also included which corroborate the theoretical propositions and simulated results.


Active and Passive Electronic Components | 2013

Current Mode Full-Wave Rectifier Based on a Single MZC-CDTA

Neeta Pandey; Rajeshwari Pandey

This paper presents a current mode full-wave rectifier based on single modified Z copy current difference transconductance amplifier (MZC-CDTA) and two switches. The circuit is simple and is suitable for IC implementation. The functionality of the circuit is verified with SPICE simulation using 0.35 μm TSMC CMOS technology parameters.


Journal of Electrical and Computer Engineering | 2011

Single CDTA-based current mode all-pass filter and its applications

Neeta Pandey; Sajal K. Paul

This paper presents a single current difference transconductance amplifier (CDTA) based all-pass current mode filter. The proposed configuration makes use of a grounded capacitor which makes it suitable for IC implementation. Its input impedance is low and output impedance is high, hence suitable for cascading. The circuit does not use any matching constraint. The nonideality analysis of the circuit is also given. Two applications, namely, a quadrature oscillator and a high Q band pass filter are developed with the proposed circuit. The functionality of the circuit is verified with SPICE simulation using 0.35 µm TSMC CMOS technology parameters.


Journal of Electrical and Computer Engineering | 2011

Operational transresistance amplifier-based multiphase sinusoidal oscillators

Rajeshwari Pandey; Neeta Pandey; Mayank Bothra; Sajal K. Paul

Multiphase sinusoidal oscillator circuits are presented which utilize Operational Transresistance Amplifier (OTRA) as the active element. The first circuit produces n odd-phase oscillations of equal amplitudes and equally spaced in phase. The second circuit is capable of producing n odd- or even- phase oscillations equally spaced in phase. An alternative approach is discussed in the third circuit, which utilizes a single-phase tunable oscillator circuit which is used to inject signals into a phase shifter circuits. An automatic gain control (AGC) circuit has been implemented for the second and third circuit. The circuits are simple to realize and have a low component count. PSPICE simulations have been given to verify the theoretical analysis. The experimental outcome corroborates the theoretical propositions and simulated results.

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Rajeshwari Pandey

Delhi Technological University

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Kirti Gupta

Bharati Vidyapeeth's College of Engineering

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Asok Bhattacharyya

Delhi Technological University

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Veepsa Bhatia

Indira Gandhi Institute of Technology

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Deva Nand

Delhi Technological University

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Ranjana Sridhar

Delhi Technological University

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Bharat Choudhary

Delhi Technological University

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Aseem Sayal

Delhi Technological University

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Praveen Kumar

Indian Institute of Technology Guwahati

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