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Dive into the research topics where Saket Karajgikar is active.

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Featured researches published by Saket Karajgikar.


Journal of Electronic Packaging | 2010

Multi-Objective Optimization to Improve Both Thermal and Device Performance of a Nonuniformly Powered Micro-Architecture

Saket Karajgikar; Dereje Agonafer; Kanad Ghose; Bahgat Sammakia; Cristina H. Amon; Gamal Refai-Ahmed

Integration of different functional components such as level two (L2) cache memory, high-speed I/O interfaces, and memory controller has enhanced microprocessor performance. In this architecture, certain functional units on the microprocessor dissipate a significant fraction of the total power while other functional units dissipate little or no power. This highly nonuniform power distribution results in a large temperature gradient with Localized hot spots that may have detrimental effects on computer performance, product reliability, and yield. Moving the functional units may reduce the junction temperature but can affect performance by a factor as much as 30%. In this paper, a multi-objective optimization is performed to minimize the junction temperature without significantly altering the computer performance. The analysis was performed for 90 nm Pentium IV Northwood architecture operating at 3 GHz clock speed. Each functional unit on the die has a specific role, so functional units with similar roles were grouped together. Thus, the actual Pentium IV die was divided into four groups (front end, execution cores, bus and L2, and out-of-order engine). Repositioning constraints were determined using circuit delay models of major functional units in a micro-architectural simulator. Thus, depending on the scenario, relocating functional units can result in virtually no performance loss (less than 2% is assumed to be minimal and is reported as 0%) to as much as 30% performance loss. From the results, the minimum and the maximum temperatures were 56.6°C and 62.2°C. This ΔT corresponds to thermal design power of 60.2 W For microprocessors with higher thermal design power (115 W) and operating at higher clock speed, higher ΔT can be realized. Based on this papers analysis, the optimized scenario resulted in a junction temperature of 56.6 ° C at the cost of a 14% performance loss.


semiconductor thermal measurement and management symposium | 2009

Thermal design optimization of a package on package

Abhilash R. Menon; Saket Karajgikar; Dereje Agonafer

In the past decade, compact components such as Chip Scale Packages and flip chips were the work horses of miniaturization. However, emerging applications are now demanding even higher packaging density. In order to fulfill this requirement, three dimensional packaging was evolved. Advantages of three dimensional packaging structure include minimal conductor length and reduce speed limiting inter chip interconnects. In the past, this packaging approach was relegated to memory devices with relatively low power (flash). Recent focus, however, has been to extend the applications of stacked packages to include high performance memory, DRAM, logic-memory stack, system in a package etc. Stacked packages can be package-on-package or die stacked (with several dice inside the same casing) or both. It is common in a mobile phone that the stacked CSP is mounted on a circuit board and there is no space for air circulation. Depending on the power, due to the torturous heat flow path, it can result in high temperatures of the packaged die and the thermal specifications of the package can be easily exceeded. Hence there is a need for thermal simulation of a variety of packaging architecture for applications of interest. The objective of this paper was to perform thermal characterization of a commercially viable PoP. In order to model this PoP, flip chip logic die package was considered as the bottom package and two memory dice stacked package was considered as the top package. Eleven different scenarios were taken into consideration for the numerical analysis. Permutations of 0.1, 0.2, 0.3 and 1, 2 and 3 W memory die and logic die was considered respectively Additional two cases are also described. Steady state analysis was performed based on which guidelines were provided. For the analysis commercially available FEA tool was considered.


semiconductor thermal measurement and management symposium | 2012

Achieving energy efficient data centers using cooling path management coupled with ASHRAE standards

Matthew Green; Saket Karajgikar; Philip Vozza; Nick Gmitter; Dan Dyer

Power trends for data center facilities continue to grow at an alarming rate. In response to this, data center operators are now implementing various practices such as adding blanking plates, hot aisle/cold aisle containment, etc. Also, in response to ASHRAEs expanded thermal guidelines [1], many data center operators are now raising the supply air temperature in an effort to further conserve energy. However, airflow in a high-density thermal environment is a complex phenomenon and requires an appropriate engineering analysis to understand all of the factors. Improperly implementing such practices, which are now known as “Industry Standard Practices”, may result in overheating of IT equipment and thus negatively affect data center operations. In the following scenarios, Cooling Path Management (CPM) is used to understand the airflow / thermal environment of the facility. ASHRAE thermal guidelines are then followed to increase the average temperature of the room. In later scenarios it is shown that with proper airflow management, ASHRAE recommendations can be implemented using a full engineering analysis. Results from the final scenario show that the CRAH unit set point can be increased by 23.8°F from the baseline scenario and 5.5 kW of stranded capacity can be regained. Results also show that “Industry Standard Practices” only enable the CRAH unit set point to be increased by 13.4°F. Following the CPM method and ASHRAE thermal guidelines will enable operators to make tangible changes to their data center using objective data.


IEEE Transactions on Components and Packaging Technologies | 2010

Electro-Thermal Analysis of In-Plane Micropump

Saket Karajgikar; Smitha Rao; Jeongsik Sin; Dereje Agonafer; Jung-Chih Chiao; Dan O. Popa; Harry E. Stephanou

This paper describes the modeling for a packaged in-plane micropump developed at the Automation and Robotics Research Institute, The University of Texas, Arlington, TX. Amongst the family of micro-electro-mechanical system (MEMS) devices, thermal actuators are important owing to their capability to deliver a large force and displacement. Due to fabrication and cost-savings advantages, these actuators are now commonly used in several applications, such as optical-communication switches, micro-assembly, and micro-positioners. The proposed micropump design is based on these actuators fabricated by a one-step deep reactive ion etching process and packaged for protection and appropriate thermal dissipation. In the current ongoing research, the thermal actuator forms an integral part of an in-plane micropump. The flow rate is controlled by the variations in actuator displacement and corresponding force generated. Flow rates of several micro-liters per minute can be obtained making this pump suitable for drug delivery applications. Actuation is caused by application of voltage and resulting joule heating effect of the MEMS chevron beams. This results in displacement of the beams (actuator) which is proportional to the difference in temperature. Some of the parameters governing the displacement include the applied voltage, resistivity of the device, substrate thickness, and air gap between the device and the substrate. In this paper, the proposed micro-pump was analyzed for its thermal performance, pumping force, and the corresponding flow rate. The analysis was performed at device, die, and package levels. Thermal analysis showed that there exists a linear relationship between the applied voltage and the resulting temperature. Maximum temperature was always noted at the center of the chevron beams. The analysis also showed that force generated by the thermal actuators mainly depends on the average temperature of the chevron beams. Maximum force of 3.73 mN was noted for the packaged micropump at 23 V. This corresponded to an average beam temperature of 453°C and a flow rate of 11.2 μl/min. Performance assessment of the pump showed that for every 5 kPa increase in backpressure, flow rate reduced approximately by 5%.


intersociety conference on thermal and thermomechanical phenomena in electronic systems | 2006

Effect of CRAC location on fixed rack layout

Vishwas Bedekar; Saket Karajgikar; Dereje Agonafer; Madhusudan Iyyengar; Roger R. Schmidt

Microprocessor driven escalation of thermal management needs has resulted in significant cooling challenges at the data center facility level, which can house thousands and tens of thousands of heat producing processors. Raised floor air ducting is the most common configuration, where chilled air from the air conditioning units is forced into the room via a under floor plenum and through perforated tiles on the floor. The hot air from the racks finds its way to the top of the air conditioning units and is then cooled and blown into the under floor plenum. The temperature at inlet of the racks is the key performance metric in evaluating the cooling performance data center facility. This rack inlet temperature is influenced by the air flow patterns within the room, which in turn is a function of several different factors such as the rack flow rates, the perforated tile location, the CRAC location, the room dimensions and geometry. In this paper the effect of the CRAC location of a fixed rack layout is studied. A representative raised floor data center was numerically modeled using commercially available software. The results of the simulations are utilized to gain insight into the flow patterns and the data from the parametric analysis is used to quantify the effect of CRAC (chilled air conditioning unit) location with respect to the computer racks


ASME 2007 InterPACK Conference collocated with the ASME/JSME 2007 Thermal Engineering Heat Transfer Summer Conference | 2007

Computational study of hybrid cooling solution for thermal management of data centers

Veerendra Mulay; Saket Karajgikar; Dereje Agonafer; Roger R. Schmidt; Madshusudan Iyengar; Jay Nigen

The power trend for server systems continues to grow thereby making thermal management of data centers a very challenging task. Although various configurations exist, the raised floor plenum with Computer Room Air Conditioners (CRACs) providing cold air is a popular operating strategy. In prior work, numerous data center layouts employing raised floor plenum and the impact of design parameters such as plenum depth, ceiling height, cold isle location, tile openings and others on thermal performance of data center were presented. The air cooling of data center however, may not address the situation where more energy is expended in cooling infrastructure than the thermal load of data center. Revised power trend projections by ASHRAE TC 9.9 predict heat loads as high as 5000W per square feet of compute servers’ equipment footprint by year 2010. These trend charts also indicate that heat load per product footprint has doubled for storage servers during 2000–2004. For the same period, heat load per product footprint for compute servers has tripled. Amongst the systems that are currently available and being shipped, many racks exceed 20kW. Such high heat loads have raised concerns over air cooling limits of data centers similar to that of microprocessors. A hybrid cooling strategy that incorporates liquid cooling along with air cooling can be very efficient in such situations. The impact of such an operating strategy on thermal management of data center is discussed in this paper. A representative data center is modeled using commercially available CFD code. The change in rack temperature gradients, recirculation cells and CRAC demand due to use of hybrid cooling is presented in a detailed parametric study. It is shown that the hybrid cooling strategy improves the cooling of data center which may enable full population of rack and better management of system infrastructure.Copyright


electronic components and technology conference | 2009

Effect of flip chip package architecture on stresses in the bump passivation opening

Saket Karajgikar; Vishal Nagaraj; Dereje Agonafer

In this paper, a non-linear analysis is performed in detail to study the effect of package architectural attributes such as die thickness, die size, substrate thickness, substrate size and passivation opening (PO) size on the stress induced in the bump during reflow process is studied in detail. A commercially available finite element analysis tool is used to evaluate the stresses induced in the bump (at the PO) due to the coefficient of thermal expansion (CTE) mismatch during the standard reflow process. Based on the numerical analysis of the legs of the DOE, the stress in the PO can vary between 7 KPa to 138 KPa. The bumps with small PO size exhibited higher stress than the bumps with large PO size. For the bumps with small PO size, the stress contours are lateral bands where as in case of the bumps with large PO size, high stress is noted at the periphery which diminishes towards the center. The packages with thick substrate and die exhibited higher stress than packages with thin substrate and die. Also, the effect of ratio of substrate size to die size on the stress in the PO was found to be insignificant. Previously, the current authors have reported the effect of various bump parameters on the current density in the bump as well as in the trace. These effects of bump parameters are combined with the effects of package architectural attributes and enhanced guidelines are presented.


Journal of Heat Transfer-transactions of The Asme | 2005

Impact of Area Contact Between Sensor Bulb and Evaporator Return Line on Modular Refrigeration Unit: Computational and Experimental

Saket Karajgikar; Nikhil Lakhkar; Dereje Agonafer; Roger R. Schmidt

In the past, virtually all commercial computers were designed to operate at temperatures above the ambient and were primarily air-cooled. However, researchers have always known the advantages of operating electronics at low temperatures. This facilitates faster switching time of semiconductor devices, increased circuit speeds due to lower electrical resistance of interconnecting materials, and reduction in thermally induced failures of devices and components. Depending on the doping characteristics of the chip, performance improvement ranges from 1% to 3% for every 10°C lower transistor temperature can be realized. The IBM S/390 high-end server system is the first IBM design which uses a conventional refrigeration system to maintain the chip temperatures below that of comparable air-cooled systems, but well above cryogenic temperature. In previous work, the focus was to study the effect of variation of evaporator outlet superheat on the flow through thermostatic expansion valve at varying evaporator temperature. The effect of change in bulb location and effect of bulb time constant on the hunting at the evaporator has been reported. The effect of area contact on the stability of the system is been predicted theoretically. Mechanical analysis is performed in order to check the stresses induced. The evaporator return line and the sensor bulb are simply attached. The effect of area contact is further studied experimentally on an experimental bench.


semiconductor thermal measurement and management symposium | 2010

Energy minimization based fan configuration for double walled telecommunication cabinet with solar load

Bharathkrishnan Muralidharan; Feroz Ahamed Iqbal Mariam; Saket Karajgikar; Dereje Agonafer; Mark Hendrix

Access networks provide the last mile of connectivity to telecommunication customers throughout the world. Voice, data, and video services through fiber, copper and wireless media are all delivered to the end user by the access portion of the network. In an access network, thermal management of active electronics and optical devices are critical to network reliability and performance. The outside plant telecom enclosures provide environmental protection for both active electronics and optical devices. These enclosures must incorporate cooling systems that support thermal requirements of the electronic and optical components. In addition to the heat load from the electronics there is also solar loading on the cabinet, which needs to be taken into account when designing a cooling system. In order to reduce the solar loading, a double walled cabinet was shown to be an effective method. In this method, air is forced between the telecommunication cabinet and the outside wall. Although the air gap is effective in reducing the solar load, its thickness was found to be insignificant [1]. Thus to reduce the cabinet dimensions, double walled cabinets with smaller air gap are recommended. However, this may impact the energy consumption of the fan and may pose acoustic problems. Hence, a study was carried out for different fan configurations and the effect it had on cabinet temperature and energy consumed by the fans were studied. From the study it was found out that there was significant change in energy consumed by fans when their location is changed.


ASME 2010 International Mechanical Engineering Congress and Exposition, IMECE 2010 | 2010

Rear Door Heat Exchanger Cooling Performance in Telecommunication Data Centers

Venkata Naga Poornima Mynampati; Saket Karajgikar; Ibraheem Sheerah; Dereje Agonafer; Shlomo Novotny; Roger R. Schmidt

The increase in the data center server heat density waves a scope for developing improved cooling technologies without raising the power consumption. It is commonly observed that 40% of the total data center energy is consumed by its cooling equipments. For higher server density cabinets, typical air cooling techniques leads to a substantial increase in the power consumption. Rear door heat exchanger, an open looped cooling technique is one of the solutions for such scenarios. In this paper, emphasis is laid on the analytical determination of the optimum heat load after calculating the effectiveness of heat exchanger at given operating conditions of the data center and heat exchanger. Later, thermal analysis is performed and the working of heat exchanger is compared for different data center heat loads. Based on the results, a ‘rule of thumb’ is verified that rear door heat exchanger could be 100% efficient in cooling the cabinets of heat loads up to 27kW. Thus, for rack heat loads less than 27KW, CRAC units can be non-operational resulting in energy savings. Furthermore, effect of RDHx in different configuration is studied and compared.Copyright

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Dereje Agonafer

University of Texas at Arlington

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Veerendra Mulay

University of Texas at Arlington

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Nikhil Lakhkar

University of Texas at Arlington

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Abhilash R. Menon

University of Texas at Arlington

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Vishal Nagaraj

University of Texas at Arlington

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