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Dive into the research topics where Saleh Heidary Shalmany is active.

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Featured researches published by Saleh Heidary Shalmany.


IEEE Journal of Solid-state Circuits | 2012

An Energy-Efficient 15-Bit Capacitive-Sensor Interface Based on Period Modulation

Zhichao Tan; Saleh Heidary Shalmany; Michiel A. P. Pertijs

This paper presents an energy-efficient capacitive-sensor interface with a period-modulated output signal. This interface converts the sensor capacitance to a time interval, which can be easily digitized by a simple digital counter. It is based on a relaxation oscillator consisting of an integrator and a comparator. To enable the use of a current-efficient telescopic OTA in the integrator, negative feedback loops are applied to limit the integrators output swing. To obtain an accurate ratiometric output signal, auto-calibration is applied. This eliminates errors due to comparator delay, thus enabling the use of a low-power comparator. Based on an analysis of the stability of the negative feedback loops, it is shown how the current consumption of the interface can be traded for its ability to handle parasitic capacitors. A prototype fabricated in 0.35 μm standard CMOS technology can handle parasitic capacitors up to five times larger than the sensor capacitance. Experimental results show that it achieves 15-bit resolution and 12-bit linearity within a measurement time of 7.6 ms for sensor capacitances up to 6.8 pF, while consuming only 64 μA from a 3.3 V power supply. Compared to prior work with similar performance, this represents a significant improvement in energy efficiency.


international symposium on industrial electronics | 2010

A flexible low-power high-resolution integrated interface for capacitive sensors

Ali Heidary; Saleh Heidary Shalmany

This paper presents a low-power high-resolution CMOS interface for capacitive sensors. The circuit is based on the use of a switched-capacitor charge amplifier, which converts the input capacitance to a voltage, which modulates the period of a relaxation oscillator. Auto-calibration is used to eliminate the undesired effects of transfer-parameter drift. The interface is suited for capacitive sensors with capacitance values from 1 pF up to 220 pF. Moreover, the measurement time can be set from about100 µs up to 50 ms. For the 10 pF range, parasitic capacitances up to 680 pF can be handled while the settling accuracy is more than 14 bits. For a measurement time of 1s, the resolution can be as high as 20 bits. In the 10 pF range, for parasitic capacitance up to 680 pF, the measured nonlinearity error is less than 5×10−5. All these features have been achieved with a chip consuming only 3 mm2 of silicon area and 5 mW of power.


IEEE Journal of Solid-state Circuits | 2016

A

Saleh Heidary Shalmany; Dieter Draxelmayr; Kofi A. A. Makinwa

−This paper presents an integrated current-sensing system (CSS) that is intended for use in battery-powered devices. It consists of a 10-mΩ on-chip metal shunt resistor, a switchedcapacitor ΔΣ ADC, and a dynamic bandgap reference (BGR) that provides the ADC’s reference voltage and also senses the shunt’s temperature. The CSS is realized in a standard 0.13-μm CMOS process, occupies 1.15 mm and draws 55 μA from a 1.5-V supply. Extensive measurements were made on 24 devices, 12 of which were directly bonded to a printed-circuitboard (PCB) and 12 of which were packaged in a standard HVQFN plastic package. For currents ranging from –5 A to +5 A and over a temperature range of –55°C to +85°C, they exhibit a maximum offset of 16 μA and a maximum gain error of ±0.3%. This level of accuracy represents a significant improvement on the state-of-the-art, and was achieved by the use of an accurate shunt temperature compensation scheme, a low-leakage sampling scheme and several dynamic error correction techniques. Index Terms−Coulomb counter, current-sensing system, metal shunt resistor, dynamic bandgap reference, temperature sensor, temperature compensation. This is the authors version of an article that has been published in this journal. Changes were made to this version by the publisher prior to publication. The final version of record is available at http://dx.doi.org/10.1109/JSSC.2015.2511168 (c) 2018 European Union Copyright. Personal use is permitted. For any other purposes, permission must be obtained from the IEEE by emailing [email protected].


international solid-state circuits conference | 2013

{\pm }\text{5}

Saleh Heidary Shalmany; Dieter Draxelmayr; Kofi A. A. Makinwa

This paper presents a micropower current-sensing system (CSS) for battery monitoring, which consists of a calibrated shunt resistor, a ΔΣ ADC, and a dynamic bandgap reference (BGR). For currents ranging from 0 to 1A over the industrial temperature range (-40°C to +85°C), it exhibits 10μA offset and ±0.03% (3σ) gain error, which is a 3× improvement on systems with off-chip external references [1,2]. This level of accuracy is achieved by the use of dynamic error-correction techniques, digital temperature compensation, and an on-chip dynamic BGR, whose spread is corrected by a single room-temperature trim.


international solid-state circuits conference | 2017

A Integrated Current-Sensing System With

Sining Pan; Yanquan Luo; Saleh Heidary Shalmany; Kofi A. A. Makinwa

Temperature sensors are often used for the temperature compensation of frequency references [1–5]. High resolution and energy efficiency are then critical requirements, the former to minimize jitter and the latter to minimize power dissipation in a given conversion time. A MEMS-resonator-based sensor meets both criteria [1], but requires two resonators. In principle, resistor-based sensors also meet these criteria, and are CMOS compatible, but previous designs have been limited by the power dissipation [2–4] or 1/f noise [6] of their readout electronics. This paper describes a CMOS temperature sensor that digitizes the temperature-dependent phase shift of an RC filter. It achieves 410µKrms resolution in a 5ms conversion time, while consuming only 160µW. This corresponds to a resolution FOM of 0.13pJ·K2, a 5× improvement on previous CMOS sensors [6].


Journal of Sensors | 2017

{\pm}\text{0.3}

Saleh Heidary Shalmany; Matthias Merz; Ali Fekri; Zu-yao Chang; Romano J. O. M. Hoofman; Michiel A. P. Pertijs

This paper demonstrates a micropower offset- and temperature-compensated smart pH sensor, intended for use in battery-powered RFID systems that monitor the quality of perishable products. Low operation power is essential in such systems to enable autonomous logging of environmental parameters, such as the pH level, over extended periods of time using only a small, low-cost battery. The pH-sensing element in this work is an ion-sensitive extended-gate field-effect transistor (EGFET), which is incorporated in a low-power sensor front-end. The front-end outputs a pH-dependent voltage, which is then digitized by means of a co-integrated incremental delta-sigma ADC. To compensate for the offset and temperature cross-sensitivity of the EGFET, a compensation scheme using a calibration process and a temperature sensor has been devised. A prototype chip has been realized in a 0.16 μm CMOS process. It occupies 0.35 × 3.9 mm2 of die area and draws only 4 μA from a 1.8 V supply. Two different types of custom packaging have been used for measurement purposes. The pH sensor achieves a linearity of better than ±0.1 for pH values ranging from 4 to 10. The calibration and compensation scheme reduces errors due to temperature cross-sensitivity to less than ±0.1 in the temperature range of 6°C to 25°C.


symposium on vlsi circuits | 2016

% Gain Error and 16 μA Offset From

Bahman Yousefzadeh; Saleh Heidary Shalmany; Kofi A. A. Makinwa

This paper presents the most accurate BJT-based CMOS temperature-to-digital converter (TDC) ever reported, with an inaccuracy of ±60mK (3σ) from -70°C to 125°C. This is 2× better than the state-of-the-art, despite being implemented in a process (160nm) that only offers low-β<sub>F</sub> (<;5) PNPs. It is also the most energy-efficient ever reported, with a resolution FOM of 7.3pJ°C<sup>2</sup>. This level of performance is achieved by an improved β<sub>F</sub>-compensation scheme, the use of dynamic error correction techniques to suppress non-BJT related errors and the use of an energy-efficient zoom-ADC based on current-reuse OTAs. These techniques also result in very low power-supply sensitivity (12mK/V), thus maintaining TDC accuracy for supply voltages ranging from 1.5V to 2V.


symposium on vlsi circuits | 2016

-\text{55}^{\;\circ} \text{C}

Saleh Heidary Shalmany; Dieter Draxelmayr; Kofi A. A. Makinwa

This paper presents an integrated shunt-based current-sensing system (CSS) capable of handling ±36A currents, the highest ever reported. It also achieves 0.3% gain error and 400μA offset, which is significantly better than the state-of-the-art. The heart of the system is a robust 260μΩ shunt made from the lead-frame of a standard HVQFN plastic package. The resulting voltage drop is then digitized by a ΔΣ ADC and a bandgap reference (BGR). At the expense of current handling capability, a ±5A version of the CSS uses a 10mΩ on-chip metal shunt to achieve just 4μA offset. Both designs were realized in a standard 0.13μm CMOS process.


symposium on vlsi circuits | 2015

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Saleh Heidary Shalmany; Gottfried Beer; Dieter Draxelmayr; Kofi A. A. Makinwa

This paper presents a fully integrated current-sensing system (CSS) that is 10x more accurate than the state-of-the-art. It consists of an on-chip shunt resistor, a ΔΣ ADC and a bandgap reference (BGR), which also senses shunt temperature. For ±5A currents, it exhibits 12μA offset and ±0.25% gain error from -40 to +85°C. This level of accuracy is achieved with the help of multiple dynamic error correction techniques, a shunt temperature compensation scheme and chip-scale packaging for low thermal and electrical resistance.


international solid-state circuits conference | 2015

+ \text{85}^{\;\circ} \text{C}

Yuming He; Zu-yao Chang; Lukasz S. Pakula; Saleh Heidary Shalmany; Michiel A. P. Pertijs

This paper presents a digitally assisted period modulation (PM)-based capacitance-to-digital converter (CDC) that is >9× smaller than prior CDCs with >10b resolution [1-4], and improves the energy efficiency by >10× compared to previous PM-based CDCs [1]. This is achieved with the help of a piece-wise charge transfer technique that eliminates the need for a large on-chip integration capacitor, a dual-integration-capacitor scheme that reduces the front-end noise contribution, a sampled-biasing technique that reduces the noise of the integration current, and a current-efficient inverter-based design.

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Kofi A. A. Makinwa

Delft University of Technology

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Michiel A. P. Pertijs

Delft University of Technology

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Zu-yao Chang

Delft University of Technology

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Ali Fekri

Delft University of Technology

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Sining Pan

Delft University of Technology

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Ali Heidary

Delft University of Technology

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Bahman Yousefzadeh

Delft University of Technology

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Long Xu

Delft University of Technology

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Lukasz S. Pakula

Delft University of Technology

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